A major challenge for replacing gate SiON with HfO2 is the instability and reliability of HfO2. U... more A major challenge for replacing gate SiON with HfO2 is the instability and reliability of HfO2. Unlike the SiON, there can be substantial amount of as-grown electron traps in HfO2. These traps can cause instability in the threshold voltage and contribute to the dielectric breakdown. Despite the early efforts, our understanding of them is incomplete. Agreement on their capture cross sections has not been reached and the reported values spread in a large range of 10−12–10−19cm2. The objective of this paper is to determine their capture cross sections unambiguously, which requires knowing the gate current and the electron fluency for filling the trap. A key part of this work is to estimate the trapping-induced transient gate current following the application of a pulse to the gate. This is achieved by numerical simulation. It is found that trapping can reduce the gate current by two orders of magnitude and the gate current can drop substantially within microseconds. The results show the presence of two distinctive capture cross sections in the order of 10−14 and 10−16cm2, respectively, which most likely originated from two different types of as-grown electron traps in HfO2. These capture cross sections are insensitive to fabrication and processing techniques.
This work investigates the anneal-induced positive charge in Hf-based dielectrics. It is found th... more This work investigates the anneal-induced positive charge in Hf-based dielectrics. It is found that anneal in forming gas produces substantially more positive charge than that in N 2 at 500 o C, indicating that hydrogen is a reactant for the positive charging. Positive charging is thermally accelerated and can occur in both HfO 2 and Hf-silicates. Nitridation of either interfacial layer or whole dielectric stack enhances the positive charging significantly. These positive charges have a large sample-to-sample variation and are stable. For the first time, both mobile and fixed charges are simultaneously observed for Hf-stacks.
A variable tCHARGE-tDISCHARGE charge pumping (VT2CP) is used to investigate the creation of traps... more A variable tCHARGE-tDISCHARGE charge pumping (VT2CP) is used to investigate the creation of traps in the SiO2 and HfO2 separately in an ALD SiO2/HfO2 metal gate stack. It is shown that by independently controlling the pulse low timing "discharging time" and high level timing "charging time", we are able to separate the traps in the interfacial SiO2 from the traps
Threshold voltage Vth instability is one major issue for future metal-oxide-semiconductor field e... more Threshold voltage Vth instability is one major issue for future metal-oxide-semiconductor field effect transistors (MOSFETs) with hafnium (Hf) based gate dielectrics. Previous attention was focused on n-channel MOSFETs (nMOSFETs) and the implicit assumption is that it is not important for p-channel MOSFETs (pMOSFETs). This work shows that the Vth instability of pMOSEFTs can be higher than that of nMOSFETs for a sub-2nm nitrided Hf layer. Unlike nMOSFETs, the Vth instability of pMOSFETs is insensitive to measurement time, does not saturate as stress voltage increases, and is not controlled by carrier fluency. Using Hf silicates is less effective in suppressing it. Some speculations are given on the defect and physical processes responsible for the instability.
The use of metal gates removes gate depletion and allows aggressive downscaling of equivalent oxi... more The use of metal gates removes gate depletion and allows aggressive downscaling of equivalent oxide thickness. The impact of changing gate from poly-Si to metal on device reliability has not been fully addressed. This work focuses on how TaN gate affects the positive charge formation in HfO2∕SiO2 stacks. Under positive gate bias stresses, the results show that positive charge formation in metal-gated samples is significantly higher than in poly-Si gated samples. However, positive charge formation is similar in these two types of samples, when stressed under negative gate bias. The results are explained by assuming that there are more hydrogenous species at the metal/dielectric interface and the hydrogen release from the anode dominates the positive charge formation. The behavior of positive charges in the stack is also compared with that in a single SiO2 layer.
In this paper we use an improved way to measure electrical traps in Hf-based dielectrics by using... more In this paper we use an improved way to measure electrical traps in Hf-based dielectrics by using Variable T charge-T discharge Charge Pumping (VT 2 CP). By independently controlling the pulse low and high level timings, we are able to clearly separate the traps in the interfacial SiO 2 from the traps in the High-layer, independently of the process conditions and Hfconcentration. The results show that the trap density varies by two orders of magnitude for the samples used in this work, indicating the importance of process optimization.
1E+15 1E+16 1E+17 1E+18 1E+19 1E+20 1E+21 1E+22 1E+23 1E+24 ... C o n c e n tra tio n (a to m /c ... more 1E+15 1E+16 1E+17 1E+18 1E+19 1E+20 1E+21 1E+22 1E+23 1E+24 ... C o n c e n tra tio n (a to m /c m ) ... 1E+00 1E+01 1E+02 1E+03 1E+04 1E+05 1E+06 1E+07 1E+08 1E+09 ... C o u n ts /s e c D12n3-N D12n4-N D14n5-N D14nnan D14nnan D15n5-N D13n2-N ...
Abstract By means of leakage current measurements, charge pumping and TDDB analysis, we construct... more Abstract By means of leakage current measurements, charge pumping and TDDB analysis, we construct a consistent model for the degradation and breakdown of 0.9 nm EOT atomic layer deposited (ALD) HfO 2. During degradation, traps and two-trap clusters are formed ...
2011 3rd IEEE International Memory Workshop (IMW), 2011
óIn this paper we investigate THANOS and THANVaS memory devices featuring a 2 nm HfO2 capping lay... more óIn this paper we investigate THANOS and THANVaS memory devices featuring a 2 nm HfO2 capping layer on top of the Al2O3 blocking dielectric. Furthermore, we benchmark these devices against reference TANOS and TANOS with variable tunnel oxide thickness (TANVaS), respectively. It is found that HfO2 capping layer improves erase saturation level due to its better electron blocking capabilities during
2009 IEEE International Reliability Physics Symposium, 2009
Elevated temperatures can significantly affect the driving forces of high-k degradation and break... more Elevated temperatures can significantly affect the driving forces of high-k degradation and breakdown. Okada et al. have proposed the generated subordinate carrier injection (GSCI) model. This model claims the universality of stress-induced leakage current (SILC) vs. hole fluence, independent of the temperature in n-channel MOSFET's with Hf and Al-based gate dielectrics. In this paper, we demonstrate that 125degC is a crucial temperature for the studied stack as an additional degradation mechanism is triggered above this temperature. Applying two material analysis techniques, SILC spectroscopy and trap spectroscopy by charge injection (TSCIS), we study the T-dependent energy spectrum of the generated defects and prove that the generation rate and the kind of participating traps in the breakdown (BD) path change at elevated temperatures.
2009 IEEE International Reliability Physics Symposium, 2009
A Variable Tcharge-Tdischarge Amplitude Charge Pumping (VT2ACP) is used to profile defect in the ... more A Variable Tcharge-Tdischarge Amplitude Charge Pumping (VT2ACP) is used to profile defect in the SiO2 and Al2O3 separately in Flash Memory based devices. It is shown that by independently controlling the pulse low timing ldquodischarging timerdquo and high level timing ldquocharging timerdquo, the contribution of interface and bulk Al2O3 traps can be separated. By using the ellipsometry and the measured
The requirements and development of high-k dielectric films for application in storage cells of f... more The requirements and development of high-k dielectric films for application in storage cells of future generation flash and Dynamic Random Access Memory (DRAM) devices are reviewed. Dielectrics with k-value in the 9-30 range are studied as insulators between charge storage layers and control gates in flash devices. For this application, large band gaps (> 6 eV) and band offsets are required, as well as low trap densities. Materials studied include aluminates and scandates. For DRAM metal-insulator-metal (MIM) capacitors, aggressive scaling of the equivalent oxide thickness (with targets down to 0.3 nm) drives the research towards dielectrics with k-values > 50. Due to the high aspect ratio of MIMCap structures, highly conformal deposition techniques are needed, triggering a substantial effort to develop Atomic Layer Deposition (ALD) processes for the deposition of metal gates and high-k dielectrics. Materials studied include Sr and Ba-based perovskites, with SrTiO3 as one of the most promising candidates, as well as tantalates, titanates and niobates.
We investigate the effect of high temperature Post-Deposition Annealing of Al 2 O 3 on the tunnel... more We investigate the effect of high temperature Post-Deposition Annealing of Al 2 O 3 on the tunnel oxide of TANOS-like non-volatile memories. We found that, when temperature steps above 850°C are applied after the stack deposition, a transition layer is forming by the intermixing of the Si 3 N 4 with the upper part of the underneath SiO 2. We found that this transition layer has worse dielectric properties as compared to SiO 2 , altering in a not-negligible way the performance of TANOS memories, and in particular severely penalizing retention.
ABSTRACT In this paper we compare a novel plasma-enhanced atomic layer deposition (PEALD) oxide w... more ABSTRACT In this paper we compare a novel plasma-enhanced atomic layer deposition (PEALD) oxide with more conventional HTO and ISSG oxides. We show that, remarkably for a deposited oxide, the oxide quality is, both in terms of field-to-breakdown and SILC generation, comparable to that of ISSG thermal oxide. Finally, we show that data retention of SONOS stack with PEALD is significantly better than for stacks with ISSG tunnel oxide. PEALD oxide is, therefore, a promising choice for 3D non-volatile flash technologies.
A major challenge for replacing gate SiON with HfO2 is the instability and reliability of HfO2. U... more A major challenge for replacing gate SiON with HfO2 is the instability and reliability of HfO2. Unlike the SiON, there can be substantial amount of as-grown electron traps in HfO2. These traps can cause instability in the threshold voltage and contribute to the dielectric breakdown. Despite the early efforts, our understanding of them is incomplete. Agreement on their capture cross sections has not been reached and the reported values spread in a large range of 10−12–10−19cm2. The objective of this paper is to determine their capture cross sections unambiguously, which requires knowing the gate current and the electron fluency for filling the trap. A key part of this work is to estimate the trapping-induced transient gate current following the application of a pulse to the gate. This is achieved by numerical simulation. It is found that trapping can reduce the gate current by two orders of magnitude and the gate current can drop substantially within microseconds. The results show the presence of two distinctive capture cross sections in the order of 10−14 and 10−16cm2, respectively, which most likely originated from two different types of as-grown electron traps in HfO2. These capture cross sections are insensitive to fabrication and processing techniques.
This work investigates the anneal-induced positive charge in Hf-based dielectrics. It is found th... more This work investigates the anneal-induced positive charge in Hf-based dielectrics. It is found that anneal in forming gas produces substantially more positive charge than that in N 2 at 500 o C, indicating that hydrogen is a reactant for the positive charging. Positive charging is thermally accelerated and can occur in both HfO 2 and Hf-silicates. Nitridation of either interfacial layer or whole dielectric stack enhances the positive charging significantly. These positive charges have a large sample-to-sample variation and are stable. For the first time, both mobile and fixed charges are simultaneously observed for Hf-stacks.
A variable tCHARGE-tDISCHARGE charge pumping (VT2CP) is used to investigate the creation of traps... more A variable tCHARGE-tDISCHARGE charge pumping (VT2CP) is used to investigate the creation of traps in the SiO2 and HfO2 separately in an ALD SiO2/HfO2 metal gate stack. It is shown that by independently controlling the pulse low timing "discharging time" and high level timing "charging time", we are able to separate the traps in the interfacial SiO2 from the traps
Threshold voltage Vth instability is one major issue for future metal-oxide-semiconductor field e... more Threshold voltage Vth instability is one major issue for future metal-oxide-semiconductor field effect transistors (MOSFETs) with hafnium (Hf) based gate dielectrics. Previous attention was focused on n-channel MOSFETs (nMOSFETs) and the implicit assumption is that it is not important for p-channel MOSFETs (pMOSFETs). This work shows that the Vth instability of pMOSEFTs can be higher than that of nMOSFETs for a sub-2nm nitrided Hf layer. Unlike nMOSFETs, the Vth instability of pMOSFETs is insensitive to measurement time, does not saturate as stress voltage increases, and is not controlled by carrier fluency. Using Hf silicates is less effective in suppressing it. Some speculations are given on the defect and physical processes responsible for the instability.
The use of metal gates removes gate depletion and allows aggressive downscaling of equivalent oxi... more The use of metal gates removes gate depletion and allows aggressive downscaling of equivalent oxide thickness. The impact of changing gate from poly-Si to metal on device reliability has not been fully addressed. This work focuses on how TaN gate affects the positive charge formation in HfO2∕SiO2 stacks. Under positive gate bias stresses, the results show that positive charge formation in metal-gated samples is significantly higher than in poly-Si gated samples. However, positive charge formation is similar in these two types of samples, when stressed under negative gate bias. The results are explained by assuming that there are more hydrogenous species at the metal/dielectric interface and the hydrogen release from the anode dominates the positive charge formation. The behavior of positive charges in the stack is also compared with that in a single SiO2 layer.
In this paper we use an improved way to measure electrical traps in Hf-based dielectrics by using... more In this paper we use an improved way to measure electrical traps in Hf-based dielectrics by using Variable T charge-T discharge Charge Pumping (VT 2 CP). By independently controlling the pulse low and high level timings, we are able to clearly separate the traps in the interfacial SiO 2 from the traps in the High-layer, independently of the process conditions and Hfconcentration. The results show that the trap density varies by two orders of magnitude for the samples used in this work, indicating the importance of process optimization.
1E+15 1E+16 1E+17 1E+18 1E+19 1E+20 1E+21 1E+22 1E+23 1E+24 ... C o n c e n tra tio n (a to m /c ... more 1E+15 1E+16 1E+17 1E+18 1E+19 1E+20 1E+21 1E+22 1E+23 1E+24 ... C o n c e n tra tio n (a to m /c m ) ... 1E+00 1E+01 1E+02 1E+03 1E+04 1E+05 1E+06 1E+07 1E+08 1E+09 ... C o u n ts /s e c D12n3-N D12n4-N D14n5-N D14nnan D14nnan D15n5-N D13n2-N ...
Abstract By means of leakage current measurements, charge pumping and TDDB analysis, we construct... more Abstract By means of leakage current measurements, charge pumping and TDDB analysis, we construct a consistent model for the degradation and breakdown of 0.9 nm EOT atomic layer deposited (ALD) HfO 2. During degradation, traps and two-trap clusters are formed ...
2011 3rd IEEE International Memory Workshop (IMW), 2011
óIn this paper we investigate THANOS and THANVaS memory devices featuring a 2 nm HfO2 capping lay... more óIn this paper we investigate THANOS and THANVaS memory devices featuring a 2 nm HfO2 capping layer on top of the Al2O3 blocking dielectric. Furthermore, we benchmark these devices against reference TANOS and TANOS with variable tunnel oxide thickness (TANVaS), respectively. It is found that HfO2 capping layer improves erase saturation level due to its better electron blocking capabilities during
2009 IEEE International Reliability Physics Symposium, 2009
Elevated temperatures can significantly affect the driving forces of high-k degradation and break... more Elevated temperatures can significantly affect the driving forces of high-k degradation and breakdown. Okada et al. have proposed the generated subordinate carrier injection (GSCI) model. This model claims the universality of stress-induced leakage current (SILC) vs. hole fluence, independent of the temperature in n-channel MOSFET's with Hf and Al-based gate dielectrics. In this paper, we demonstrate that 125degC is a crucial temperature for the studied stack as an additional degradation mechanism is triggered above this temperature. Applying two material analysis techniques, SILC spectroscopy and trap spectroscopy by charge injection (TSCIS), we study the T-dependent energy spectrum of the generated defects and prove that the generation rate and the kind of participating traps in the breakdown (BD) path change at elevated temperatures.
2009 IEEE International Reliability Physics Symposium, 2009
A Variable Tcharge-Tdischarge Amplitude Charge Pumping (VT2ACP) is used to profile defect in the ... more A Variable Tcharge-Tdischarge Amplitude Charge Pumping (VT2ACP) is used to profile defect in the SiO2 and Al2O3 separately in Flash Memory based devices. It is shown that by independently controlling the pulse low timing ldquodischarging timerdquo and high level timing ldquocharging timerdquo, the contribution of interface and bulk Al2O3 traps can be separated. By using the ellipsometry and the measured
The requirements and development of high-k dielectric films for application in storage cells of f... more The requirements and development of high-k dielectric films for application in storage cells of future generation flash and Dynamic Random Access Memory (DRAM) devices are reviewed. Dielectrics with k-value in the 9-30 range are studied as insulators between charge storage layers and control gates in flash devices. For this application, large band gaps (> 6 eV) and band offsets are required, as well as low trap densities. Materials studied include aluminates and scandates. For DRAM metal-insulator-metal (MIM) capacitors, aggressive scaling of the equivalent oxide thickness (with targets down to 0.3 nm) drives the research towards dielectrics with k-values > 50. Due to the high aspect ratio of MIMCap structures, highly conformal deposition techniques are needed, triggering a substantial effort to develop Atomic Layer Deposition (ALD) processes for the deposition of metal gates and high-k dielectrics. Materials studied include Sr and Ba-based perovskites, with SrTiO3 as one of the most promising candidates, as well as tantalates, titanates and niobates.
We investigate the effect of high temperature Post-Deposition Annealing of Al 2 O 3 on the tunnel... more We investigate the effect of high temperature Post-Deposition Annealing of Al 2 O 3 on the tunnel oxide of TANOS-like non-volatile memories. We found that, when temperature steps above 850°C are applied after the stack deposition, a transition layer is forming by the intermixing of the Si 3 N 4 with the upper part of the underneath SiO 2. We found that this transition layer has worse dielectric properties as compared to SiO 2 , altering in a not-negligible way the performance of TANOS memories, and in particular severely penalizing retention.
ABSTRACT In this paper we compare a novel plasma-enhanced atomic layer deposition (PEALD) oxide w... more ABSTRACT In this paper we compare a novel plasma-enhanced atomic layer deposition (PEALD) oxide with more conventional HTO and ISSG oxides. We show that, remarkably for a deposited oxide, the oxide quality is, both in terms of field-to-breakdown and SILC generation, comparable to that of ISSG thermal oxide. Finally, we show that data retention of SONOS stack with PEALD is significantly better than for stacks with ISSG tunnel oxide. PEALD oxide is, therefore, a promising choice for 3D non-volatile flash technologies.
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Papers by mohammed zahid