chakib nehnouh

Followers

Following

Public Views

William Menasco

Roberto de Freitas Junior

Universidade Federal do Rio de Janeiro (UFRJ)

Michael Hirsch

Nancy Wrinkle

Northeastern Illinois University

Jessica Purcell

Alexandra Aviles

Saul Schleimer

University of Warwick

Christopher Leininger

Uirá Matos

David Yetter

Interests

Uploads

Papers by chakib nehnouh

A new architecture for online error detection and isolation in network on chip

Journal of High Speed Networks, Dec 23, 2020

This paper is the first in a series which study the closed braid representatives of an oriented l... more This paper is the first in a series which study the closed braid representatives of an oriented link type 2? in oriented 3-space. A combinatorial symbol is introduced which determines an oriented spanning surface F for a representative L of 3?. The surface F is in a special position in 3-space relative to the braid axis A and the fibers in a fibration of the complement of A. The symbol simultaneously describes F as an embedded surface and L as a closed braid. Therefore it is both geometrically and algebraically meaningful. Using it, a complexity function is introduced. It is proved that 3* is described by at most finitely many combinatorial symbols, and thus by finitely many conjugacy classes in each braid group B n when the complexity is minimal.

Download

Fault tolerant and congestion aware routing algorithm for network on chip1

Journal of High Speed Networks, Aug 23, 2019

Continuous technology scaling in semiconductor industry makes the system reliability as a serious... more Continuous technology scaling in semiconductor industry makes the system reliability as a serious concern in the area of nanoscale computing. In this paper, a fully adaptive routing algorithm is proposed to overcome faults in NoCs (Network-on-Chip). This algorithm called DINRA-NoC (DIstiributed and New Routing Algorithm for NoC) is distributed, fault tolerant and congestion-aware. First, each node selects the appropriate output to route packets to neighbor routers according to the state of each link and router. Secondly, the proposed routing algorithm takes in account the status of adjacent routers traffic to update the congestion metric. DINRA-NoC does not use any VCs (Virtual Channels) and is deadlock-free. A simulation of the proposed routing algorithm has been carried out using Noxim simulator. The results show that DINRA ensures a good reliability rate despite of the presence of many faulty routers/links. In other hand, the simulation results indicate that the performance of the proposed routing algorithm surpasses the performance of existing algorithms in terms of lowering the congestion, improving average latency and increasing throughput.

Download

A fault-tolerant and congestion-aware routing algorithm for Networks-on-Chip

13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010

This paper presents a fault-tolerant routing algorithm for mesh-based Networks-on-Chip (NoC) with... more This paper presents a fault-tolerant routing algorithm for mesh-based Networks-on-Chip (NoC) with faulty links. It is a distributed, adaptive and congestion-aware routing algorithm where only two virtual channels are used for both adaptiveness and fault-tolerance. The proposed routing method has a multilevel fault-tolerance capability and therefore it is capable to tolerate more faulty links in more complicated faulty situations with additional hardware costs. The network performance, faulttolerance capability and hardware overhead are evaluated through appropriate simulations. The experimental results show that the overall reliability of a Network-on-Chip is significantly enhanced against multiple link failures or partially faulty routers with only a small hardware overhead.

Download

A New Fault Tolerant Routing Algorithm for Networks on Chip

International Journal of Embedded and Real-Time Communication Systems, 2019

To provide correct data transmission and to handle the communication requirements, the routing al... more To provide correct data transmission and to handle the communication requirements, the routing algorithm should find a new path to steer packets from the source to the destination in a faulty network. Many solutions have been proposed to overcome faults in network-on-chips (NoCs). This article introduces a new fault-tolerant routing algorithm, to tolerate permanent and transient faults in NoCs. This solution called DINRA can satisfy simultaneously congestion avoidance and fault tolerance. In this work, a novel approach inspired by Catnap is proposed for NoCs using local and global congestion detection mechanisms with a hierarchical sub-network architecture. The evaluation (on reliability, latency and throughput) shows the effectiveness of this approach to improve the NoC performances compared to state of art. In addition, with the test module and fault register integrated in the basic architecture, the routers are able to detect faults dynamically and re-route packets to fault-free ...

Download

Design and Implementation of a New Routing Algorithm for Fault Tolerance in Networks on Chip - DINRA-FTNoC

International Journal of Grid and Distributed Computing, 2018

The possibility to integrate more and more cores on the same chip puts severe constraints on the ... more The possibility to integrate more and more cores on the same chip puts severe constraints on the reliability, to which it is important to provide correct services in the presence of faults. The system should work properly when some faults occur in routers/links. However, the communication has a huge impact on the performance of the Network on Chip, and designing an efficient routing algorithm is more required. To handle the communication requirements, the routing algorithm should find a new path to steer packets from the source to the destination in a faulty network. Many fault tolerant routing algorithms are used to overcome the faults in Network on chip. However, these routing algorithms, suffer from another's problems like the congestion. In this work, a novel approach inspired by Catnap is proposed for NoCs using Local and Global congestion detection mechanisms with a hierarchical sub-networks architecture. With the help of these two techniques, the NoC becomes fault tolerant and is able to efficiently utilize the throughput. The simulation shows that the proposed algorithm gives a better performance by reducing the latency and increasing the reliability of the network. In addition, the algorithm has another advantage: it reduces the congestion which is considered as a temporary fault. Simulations show that our proposed algorithm reduces the latency more than 15% and throughput is improved by 20% compared to the PDA-FTR routing.

Download

Collaborative Routing Algorithm for Fault Tolerance in Network on Chip CRAFT NoC

International Journal of Advanced Computer Science and Applications, 2017

Many fault tolerance techniques have been proposed in Network on Chip to cope with defects during... more Many fault tolerance techniques have been proposed in Network on Chip to cope with defects during fabrication or faults during product lifetime. Fault tolerance routing algorithm provide reliable mechanisms for continue delivering their services in spite of defective nodes due to the presence of permanent and/or transient faults throughout their lifetime implementation. This paper presents a new approach in the domain of fault-tolerant NoC with two main contributions. Firstly, we consider a unified fault model that include transient faults, permanent faults and congestion considered as a fault. Secondly, we present a new architecture based on sub-nets and give an overview of the associated test and (re)routing algorithm. The main result of this paper, is a new routing algorithm called Collaborative Routing Algorithm for Fault Tolerance in Network on Chip (CRAFT-NoC). We compare our approach with ACO-FAR that considers as well congestion and permanent faults. Our simulation results show significant improvements in terms of both latency and reliability.

Download

Robotique Collective: Implémentation d'un comportement d'agrégation stratégique inspiré de comportement des Cafards

ceur-ws.org

Résumé. L'exploration et l'exploitation collectives d'un environnement inconnu par... more

Download

A new architecture for online error detection and isolation in network on chip

Journal of High Speed Networks, 2020

The Network-on-Chip (NoC) has become a promising communication infrastructure for Multiprocessors... more The Network-on-Chip (NoC) has become a promising communication infrastructure for Multiprocessors-System-on-Chip (MPSoC). Reliability is a main concern in NoC and performance is degraded when NoC is susceptible to faults. A fault can be determined as a cause of deviation from the desired operation of the system (error). To deal with these reliability challenges, this work propose OFDIM (Online Fault Detection and Isolation Mechanism),a novel combined methodology to tolerate multiple permanent and transient faults. The new router architecture uses two modules to assure highly reliable and low-cost fault-tolerant strategy. In contrast to existing works, our architecture presents less area, more fault tolerance, and high reliability. The reliability comparison using Silicon Protection Factor (SPF), shows 22-time improvement and that additional circuitry incurs an area overhead of 27%, which is better than state-of-the-art reliable router architectures. Also, the results show that the t...

A new architecture for online error detection and isolation in network on chip

Journal of High Speed Networks, Dec 23, 2020

Download

Fault tolerant and congestion aware routing algorithm for network on chip1

Journal of High Speed Networks, Aug 23, 2019

Download

A fault-tolerant and congestion-aware routing algorithm for Networks-on-Chip

13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010

Download

A New Fault Tolerant Routing Algorithm for Networks on Chip

International Journal of Embedded and Real-Time Communication Systems, 2019

Download