Papers by Zmago Brezocnik
An approach is presented for automatic formal verification of digital hardware designs using Prol... more An approach is presented for automatic formal verification of digital hardware designs using Prolog. Validation of design correctness is made by formal proof as an alternative to the traditional approach which utilizes simulation. A hardware design methodology based on this framework entails: writing a specification of required design, designing a circuit intended to implement it, and proving mathematically that the
In spite of the current worldwide economic crisis, the intensive development of digital technolog... more In spite of the current worldwide economic crisis, the intensive development of digital technologies (increasingly capable computers and information-communication technologies) has not stopped. We are witnessing rapid and sometimes even leaping development of the digital technologies, which can often not be followed by the professional community, not to mention the general public. Research is needed to see what changes the digitisation and digital technologies have brought to the media production so far and what changes are to be expected in the future. The expected joint results and project achievements are the preparation of a common digital media manual on the use and exploitation of digital media production and the organisation of thematic discussions in the framework of joint scientific meeting „Society and Technology“ (Croatia, Lovran, 2012, and Slovenia, Rogaska Slatina, 2013).
EdMedia: World Conference on Educational Media and Technology, 2003
Abstract Deaf people have several problems in communicating with hearing people. Usually, they ha... more Abstract Deaf people have several problems in communicating with hearing people. Usually, they have a lot of problems even with such, for hearing people simple tasks, as understanding the written language. However, deaf people are very skilled in using the sign language equals to a word in a written language. Similar, a sentence in a written language equals to a sequence of gestures in a sign language. VISIOCOM is a Project which support the tutors of deaf people with knowledge, how to use advance technologies, for instance ...
International Journal of Innovative Science and Research Technology, 2020
A pipe organ is a musical instrument that produces sound by driving pressurized air through the o... more A pipe organ is a musical instrument that produces sound by driving pressurized air through the organ pipes selected from a keyboard called a manual. It is constructed from settled groups of pipes. Each group is composed of similar pipes with the same tone colour and loudness but different pitch. Such a group is called a rank. We have developed two electronic devices for upgrading the organ. The first device named Controller of Register Combinations is intended for storing rank combinations and pipe organ controlling. The second device named Controller of Tone Keys for pipe organ allows users to play the organ simultaneously on two separate keyboards. In this paper, we represent the purpose, scheme, and our realization of both devices. The correct functioning of the devices was proved by integrating them into a church organ. We have already equipped several church organs with our electronics, and they all work flawlessly. Feedback from the organists is excellent, as both Controller ...
New applications are driving the convergence of traditional circuit-switched telecommunication ne... more New applications are driving the convergence of traditional circuit-switched telecommunication networks and packet based networks. As long as full transition to packet based operation will not be possible, interoperability between the two networks will be essential. In this paper we focus on functional and design specification of signalling gateway between Session Initiation Protocol (SIP) and V5.2 Interface using Digital subscriber Signalling System No.1 (DSS1). The signalling gateway is designed to be a part of Iskratel's SI2000 V5 product family. Its main objective will be to enable users of SIP User Agents-local or remote-to use the switch node's functionality in the same manner as the ISDN (Integrated Services Digital Network) users do.
In this article, the development of software for SI2000 digital switch node is described, focusin... more In this article, the development of software for SI2000 digital switch node is described, focusing on software architecture for a MGCP protocol stack. A decoder and an encoder for the MGCP protocol have been developed with the PCCTS tool version 1.33, which supports generation of top-down LL(k) parsers in C and C++ programming language. Software planning phase is a very important and time-consuming task, but it is also important to investigate how to implement requested functionality and guarantee proper scalability. To meet the scalability requirements, we had to extend the PCCTS tool with the support for parallel execution of more than one decoder and encoder. Telecommunication management applications also have to support decoding and encoding of MGCP messages. To enable such support for these kinds of applications, we developed an OCX control for the MGCP protocol.
Spin is one of the leading verification tools for the model checking of distributed systems. It i... more Spin is one of the leading verification tools for the model checking of distributed systems. It is used over a broad spectrum of applications where systems can be represented as asynchronously running processes. This paper provides an overview of the concepts of model checking, the Spin model checker together with its input language Promela, and of the available graphical user interfaces to Spin. In order to offer Spin users an integrated development environment for Spin, we have developed a SpinRCP. We introduce its structure and demonstrate some of its features by considering a standard algorithm for leader election in a unidirectional
IEEE Access, 2020
Deep learning algorithms have seen success in a wide variety of applications, such as machine tra... more Deep learning algorithms have seen success in a wide variety of applications, such as machine translation, image and speech recognition, and self-driving cars. However, these algorithms have only recently gained a foothold in the embedded systems domain. Most embedded systems are based on cheap microcontrollers with limited memory capacity, and, thus, are typically seen as not capable of running deep learning algorithms. Nevertheless, we consider that advancements in compression of neural networks and neural network architecture, coupled with an optimized instruction set architecture, could make microcontroller-grade processors suitable for specific low-intensity deep learning applications. We propose a simple instruction set extension with two main components-hardware loops and dot product instructions. To evaluate the effectiveness of the extension, we developed optimized assembly functions for the fully connected and convolutional neural network layers. When using the extensions and the optimized assembly functions, we achieve an average clock cycle count decrease of 73% for a small scale convolutional neural network. On a per layer base, our optimizations decrease the clock cycle count for fully connected layers and convolutional layers by 72% and 78%, respectively. The average energy consumption per inference decreases by 73%. We have shown that adding just hardware loops and dot product instructions has a significant positive effect on processor efficiency in computing neural network functions.
[1991] Proceedings, Advanced Computer Technology, Reliable Systems and Applications
The paper introduces a functional-based approach to formal specification and verification of digi... more The paper introduces a functional-based approach to formal specification and verification of digital circuits. A "Past operator" is defined in order to describe sequential behaviours. Prolog is used both as a hardware description language and also as an inference mechanism for proving the correctness of the design. The verification process runs largely automatically. Some designs with a n interesting degree o f complexity have already been verified.
This paper suggests binary decision diagram (BDD) as a useful data structure for representing ima... more This paper suggests binary decision diagram (BDD) as a useful data structure for representing images and image sequences. First, we give a short description of BDDs. Next, we show how they can be used to represent images. We perform some tests with bintrees and two common types of binary decision diagrams, ROBDDs and 0-sup-BDDs. Results show that BDDs are very efficient. ******************************************************************************** NOTES: In Slovene
Process algebras are a convenient tool for describing and reasoning about the behaviour of concur... more Process algebras are a convenient tool for describing and reasoning about the behaviour of concurrent systems. A variety of equivalence relations are used to study the relationship between different systems or between different levels of abstractions of the system. This paper reports on an implementation of a testing equivalence with binary decision diagrams (BDDs). It is defined in terms of observations that process may or must satisfy. As the testing equivalence is shown to be an instance of a bisimulation equivalence, efficient algorithms for computing bisimulations using BDDs could be employed for its implementation. ******************************************************************************** NOTES: /
Binary decision diagrams (BDD) are very successful data structure for representation and manipula... more Binary decision diagrams (BDD) are very successful data structure for representation and manipulation of Boolean functions. Various types of BDDs have been proposed. In this paper relations between OBDD, OFDD, and 0-sup-BDD are shown in a new way. A generic decomposition rule for them is introduced. Using this rule a set of 288 types of BDDs is defined together with their reduction rules. ******************************************************************************** NOTES: In Slovene
/ ******************************************************************************** NOTES: This pa... more / ******************************************************************************** NOTES: This paper has been superseded. Its main results are covered in paper "Exploring properties of a bounded retransmission protocol with VIS", CIT --- Journal of Computing and Information Technology, 1999.
Elektrotehniski Vestnik/Electrotechnical Review
This paper describes data structures and algorithms for the representation of Boolean functions w... more This paper describes data structures and algorithms for the representation of Boolean functions with reduced ordered binary decision diagrams (ROBDDs). A hash table is used for quick search. Additional information about variables and functions is stored in binary trees. Manipulations on functions are based on a recursive algorithm of ITE operation. The primary goal of this article is to describe programming technics needed to realize the idea. For the first time here recursive algorithms for composing functions and garbage collection with a formulae counter are presented. This is better than garbage collection in other known implementations. The results of the tests show that the described representation is very eficient in applications which operate with Boolean functions. ******************************************************************************** NOTES: In Slovene. The main results of this paper are also covered in paper "Representation of Boolean functions with ROBDDs&q...
In this article, the development of software for SI2000 digital switch node is described, focusin... more In this article, the development of software for SI2000 digital switch node is described, focusing on software architecture for a MGCP protocol stack. A decoder and an encoder for the MGCP protocol have been developed with the PCCTS tool version 1.33, which supports generation of top-down ÄÄ´µ parsers in C and C++ programming language. Software planning phase is a very important and time-consuming task, but it is also important to investigate how to implement requested functionality and guarantee proper scalability. To meet the scalability requirements, we had to extend the PCCTS tool with the support for parallel execution of more than one decoder and encoder. Telecommunication management applications also have to support decoding and encoding of MGCP messages. To enable such support for these kinds of applications, we developed an OCX control for the MGCP protocol. Razvoj protokolnega sklada MGCP za telefonsko centralo SI2000 Povzetek. Prispevek predstavlja razvoj programske oprem...
This paper presents the Spin trail to a Message Sequence Chart conversion tool (st2msc) that was ... more This paper presents the Spin trail to a Message Sequence Chart conversion tool (st2msc) that was developed as an auxiliary tool to a well-known Spin model checker. If the model of the system does not satisfy the specified requirement, Spin outputs the trail that demonstrates the exact execution path of the system, leading to wrong behaviour. The Spin trail is usually very long and, thus, very difficult to explore. The st2msc tool converts the Spin trail into a more readable MSC diagram adjusted to an engineer's needs. Therefore, debugging of the execution trail is significantly lightened. We demonstrate the power of the tool on a real-life implementation of the ISDN User Adaptation protocol. The first results are very promising and give us many ideas for further improvements.
Efficient Symbolic Tools (EST) is a software package for formal verification of concurrent system... more Efficient Symbolic Tools (EST) is a software package for formal verification of concurrent systems. It appears as an educational project and has been entirely written in the Laboratory of Microcomputer Systems at the Faculty of Electrical Engineering and Computer Science in Maribor. The main purpose of our work was a study of algorithms that could serve for formal verification of complex protocols, which are used in computer and telecommunication networks. ******************************************************************************** NOTES: This paper is a little bit outdated.
We study a sort of logic riddles given as a set of facts from which other facts must be derived. ... more We study a sort of logic riddles given as a set of facts from which other facts must be derived. These problems, usually stated for entertainment, can be easily solved if there is only a small number of possible solutions. However, they become much more complex when the number of facts and possible solutions grows. The problem motivated us to think about a framework for automatic solving using computer. It is based on a propositional calculus. The most complex part of the system is parsing and understanding of the facts stated in a natural language as well as their transformation into mathematical formulae. ******************************************************************************** NOTES: In Slovene
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Papers by Zmago Brezocnik