Papers by Stéphane Meillère
Conception de circuits intégrés analogiques mode courant applicable aux systèmes de télécommunications
Les circuits integres analogiques CMOS dedies au traitement de l'information sont de plus en ... more Les circuits integres analogiques CMOS dedies au traitement de l'information sont de plus en plus soumis a de fortes contraintes technologiques et doivent repondre a des criteres de performances accrues, en terme de rapidite et de puissance consommee. L'integration des circuits analogiques souleve une difficulte supplementaire qui se traduit par la densite d'integration. L'ensemble des travaux presentes dans ce memoire s'inscrit dans l'etude des architectures basees sur les techniques 'mode courant', qui permettent de repondre aux contraintes technologiques actuelles. Ainsi, une premiere approche consiste a rappeler les structures CMOS homologues aux structures bipolaires generalement introduites par la theorie des circuits translineaires. Une deuxieme approche consiste a proposer une equivalence entre les circuits translineaires et les circuits CMOS. L'ensemble de l'etude des techniques 'mode courant' a permis la mise en œuvre d'u...
XPAD, a new read-out pixel chip for X-ray counting
2000 IEEE Nuclear Science Symposium. Conference Record (Cat. No.00CH37149)
Hybrid pixel detectors featuring a high signal to noise ratio, real 2 dimensional reconstruction ... more Hybrid pixel detectors featuring a high signal to noise ratio, real 2 dimensional reconstruction and local intelligence, have now been demonstrated to be one of the most powerful trackers for high energy physics experiments. They have, therefore, gained interest in other physics fields and for medical applications. However, the conversion of pixel detectors from high energy physics to X-ray detection
Micromachines, 2020
This paper presents a low-noise and low-power audio preamplifier. The proposed low-noise preampli... more This paper presents a low-noise and low-power audio preamplifier. The proposed low-noise preamplifier employs a delay-time chopper stabilization (CHS) technique and a negative-R circuit, both in the auxiliary amplifier to cancel the non-idealities of the main amplifier. The proposed technique makes it possible to mitigate the preamplifier 1/f noise and thermal noise and improve its linearity. The low-noise preamplifier is implemented in 65 nm complementary metal-oxide semiconductor (CMOS) technology. The supply voltage is 1.2 V, while the power consumption is 159 µW, and the core area is 192 µm2. The proposed circuit of the preamplifier was fabricated and measured. From the measurement results over a signal bandwidth of 20 kHz, it achieves a signal-to-noise ratio (SNR) of 80 dB, an equivalent-input referred noise of 5 nV/√Hz and a noise efficiency factor (NEF) of 1.9 within the frequency range from 1 Hz to 20 kHz.
International Journal of Electronics Letters, 2020
HAL is a multi-disciplinary open access archive for the deposit and dissemination of scientific r... more HAL is a multi-disciplinary open access archive for the deposit and dissemination of scientific research documents, whether they are published or not. The documents may come from teaching and research institutions in France or abroad, or from public or private research centers. L'archive ouverte pluridisciplinaire HAL, est destinée au dépôt et à la diffusion de documents scientifiques de niveau recherche, publiés ou non, émanant des établissements d'enseignement et de recherche français ou étrangers, des laboratoires publics ou privés.
E3S Web of Conferences, 2016
Piezoresistive sensors convert a physical value into a resistance variation. Often four resistive... more Piezoresistive sensors convert a physical value into a resistance variation. Often four resistive elements are connected together in a Wheatstone bridge to provide electrical variations of sensors. When this structure is biased with a fixed voltage source or a current source the topology provides a differential output voltage. To exploit information a conditioning circuit is associated to the bridge. In most cases it consists of an instrumentation amplifier followed by a data converter to obtain very quickly a digital representation of information. Due to the high input impedance of the instrumentation amplifier, bridge sensitivity is preserved. A filter may be added to avoid aliasing or a continuous time sigma-delta modulator that includes filtering feature. This study is concerning the conditioning structure for piezoresistive sensors bridge especially fully integrated microphones for biomedical application. The bridge signal to noise ratio is set by biasing the amplifier stage by current. The noise performance becomes the limiting factor of the read-out circuit. Current mode topologies drive amplifiers design where inputs are the main noise contributor. Modeling noise contribution is a key point in the design of the conditioning circuit. The current consumption leads noise performances too. A proposed architecture was implemented in a 65nm CMOS standard technology for performance measurement and evaluation with nanowire based microphone dedicated to hearing aids application.
Dispositif resisitif a jauge de contrainte a nanofils de silicium et procede d'optimisation de la consommation electrique d'un tel dispositif
Emetteur Récepteur RFID à 13,56 MHz
Analysis of the IEEE 802.15.4a UWB PHY layer for optimizing the power consumption of the transmitter
2013 IEEE International Conference on Ultra-Wideband (ICUWB), 2013
ABSTRACT This paper presents an analysis of the power consumption of the UWB PHY layer of the IEE... more ABSTRACT This paper presents an analysis of the power consumption of the UWB PHY layer of the IEEE 802.15.4a standard. This work focuses on the transmitter PHY layer implementation. The influence of the different modes settings on the power consumption is investigated. The considered implementations use an FPGA coupled with an UWB pulse generator implemented in an ASIC. The first PHY layer implementation is fully integrated in the FPGA. The consumption study reveals that the system consumption is reduced with the Mean PRF of 3.9 MHz due to the lower number of emitted pulses. The study also shows that the highest power consumption is due to the 499.2 MHz clock. The second implementation proposes to move the 499.2 MHz clock into the ASIC to reduce its consumption. For the mandatory data rate and the 3.9 MHz Mean PRF, this technique reduces the energy by emitted bit from 2574 pJ to 727 pJ.
OOK/NCP-FSK modulator based on coupled open-closed-loop VCOs
2007 18th European Conference on Circuit Theory and Design, 2007
In this paper a simple FSK/OOK modulator based on a proposed CMOS coupled voltage controlled osci... more In this paper a simple FSK/OOK modulator based on a proposed CMOS coupled voltage controlled oscillators is presented. In FSK mode the circuit is a non-continuous phase FSK (NCPFSK) which exhibits a relatively low phase discontinuity at the frequency transition times. The proposed modulator is built from CMOS inverters. The circuit is self biased and the frequency of oscillations can
Low-noise smart sensor based on silicon nanowire for MEMS resistive microphone
2013 IEEE SENSORS, 2013
ABSTRACT The design of CMOS integrated circuits dedicated to hybrid integration of a MEMS resisti... more ABSTRACT The design of CMOS integrated circuits dedicated to hybrid integration of a MEMS resistive microphone with readout interface is presented. Audio sensing is achieved with an innovative low-cost technology that implements piezoresistive detection in MEMS devices with single crystal silicon nanowires. The complete circuit includes a custom designed analog front-end consisting of a sensor conditioning and a fourth order single bit continuous-time sigma-delta modulator (CT-ΣΔM). The complete interface circuit exhibits a current consumption of 2mA. The obtained smart-sensor features a reduced output data rate that is suitable for a wireless sensor network with direct transmission of the raw data to a remote base station.
Fast power switching low-noise amplifier for 6–10 GHz ultra-wideband applications
2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS), 2013
ABSTRACT This work presents a novel fast switching low power low noise amplifier (LNA) for 6-10 G... more ABSTRACT This work presents a novel fast switching low power low noise amplifier (LNA) for 6-10 GHz ultra wide band applications using 0.13μm CMOS process from STMicroelectronics. The LNA operates at 1.2V. It achieves a high differential voltage gain about 46 dB with 4.4dB noise figure and a power consumption of 24mW. Fast on and off power switching is achieved by using differential amplifiers with DC coupled eliminating the use of large capacitors that leads to long charging time constants. The output voltage is settled in 1.5 ns when the LNA is switched on and off. The circuit consumes only 32.4 μW of dc power when duty-cycled@100kbps allowing reducing the power consumption.
Single ended rail-to-rail CMOS OTA based variable-frequency ring-oscillator
2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512)
A new current-controlled ring oscillator based on a single-ended rail-to-rail operational transco... more A new current-controlled ring oscillator based on a single-ended rail-to-rail operational transconductance amplifier (OTA) and three simple CMOS inverters is presented in this paper. The tuning frequency of the proposed oscillator is achieved by modifying the OTA DC bias current. Our ...
An inertial smart-sensor based on silicon nanowires for wireless sportive activity monitoring
2011 IEEE SENSORS Proceedings, 2011
ABSTRACT This paper presents the design of a CMOS integrated circuit dedicated to the hybrid inte... more ABSTRACT This paper presents the design of a CMOS integrated circuit dedicated to the hybrid integration of a three-axis inertial smart-sensor with digital interface. Inertial sensing is achieved with an innovative low-cost technology that implements piezoresistive detection in MEMS devices with single-crystal silicon nanowires. The circuit includes a custom-designed analog front-end that achieves the bias and readout of the sensor, and an analog-to-digital converter with oversampling and integrated digital decimation. The obtained smart-sensor features a reduced output data rate that is suitable for a wireless sensor network with direct transmission of the raw data to a remote base station.
Design of CMOS VCO and Combiner used in RF Transmitter for Wireless sensors
ABSTRACT This paper describes a transmitter circuit based on CMOS standard technology. It operate... more ABSTRACT This paper describes a transmitter circuit based on CMOS standard technology. It operates with the 863??870 MHz European band for Wireless Sensor applications. The proposed transmitter combines a BFSK modulator which uses the Frequency Hopping Spread Spectrum (FHSS) and it is designed for short range wireless applications, an up conversion mixer and a power amplifier. In this paper, two important blocs are presented and discussed: a Voltage Controlled ring Oscillator (VCO) and a new Combiner architecture for direct conversion transmitter based on CMOS inverters only. The oscillation frequency of the VCO is controlled by a voltage VCTRL. Simulation results of the proposed VCO show that power consumption, at desired oscillation frequency and under a supply voltage of 3.3 V, is only 7.48 mW and the phase noise is lower than - 126 dBc/Hz at 10 MHz offset frequency. The combiner operates with transconductance cells and a typical application of subtractor is presented to illustrate the circuit capabilities. Index Terms ?? Wireless sensor, CMOS technology, direct conversion transmitter, Ring VCO, CMOS inverter, Combiner.
A partial tree vector quantizer dynamic element matching technique for audio Δ-Σ converters
2011 IEEE Custom Integrated Circuits Conference (CICC), 2011
Multi-bit �-� modulators are widely used in performing accurate, low-power, and low cost analogue... more Multi-bit �-� modulators are widely used in performing accurate, low-power, and low cost analogue-to-digital conversion (ADC). One of its major limits is the internal feedback digital-to-analogue converter (DAC) non-linearity. It generates unwanted tones and noise in the band of interest, which makes impossible to achieve the signal quality required in audio products. Authors have overcome this difficulty by designing mismatch-shaping techniques, also called Dynamic Element Matching (DEM). We propose in this paper a new vector-based DEM that we have added to a 4 th order continuous-time ADC. It achieves good audio performances for a reasonable gate count. I. INTRODUCTION
7th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2012
A low-noise instrumentation amplifier dedicated to a nano-and micro-electro-mechanical system (M&... more A low-noise instrumentation amplifier dedicated to a nano-and micro-electro-mechanical system (M&NEMS) microphone for the use in Internet of Things (IoT) applications is presented. The piezoresistive sensor and the electronic interface are respectively, silicon nanowires and an instrumentation amplifier. To design an instrumentation amplifier for IoT applications, different trade-offs are discussed like power consumption, gain, noise and sensitivity. Because the most critical noisy block is the amplifier, a delay-time chopper stabilization (CHS) technique is implemented around it to eliminate its offset and 1/f noise. The low-noise instrumentation amplifier is implemented in a 65-nm CMOS (Complementary metal-oxide-semiconductor) technology. The supply voltage is 2.5 V while the power consumption is 0.4 mW and the core area is 1 mm 2 . The circuit of the M&NEMS microphone and the amplifier was fabricated and measured. From measurement results over a signal bandwidth of 20 kHz, it achieves a signal-to-noise ratio (SNR) of 77 dB.
Lecture Notes in Computer Science, 2011
We describe in this paper a low-noise, low-power and low-voltage analog front-end amplifier dedic... more We describe in this paper a low-noise, low-power and low-voltage analog front-end amplifier dedicated to high resistive gas sensor detection. A mobile sensor system for very low level signals such as gas spikes detection is required to implement with a scaled CMOS technology. For a key circuit of these systems, a Chopper Stabilization Amplifier (CHS) which suppresses DC offset and 1/f noise figure of MOS devices is commonly used.
Combiners based on CMOS inverters and application in RF transmitter for wireless sensors
7th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2012
A new Combiner architecture for direct conversion transmitter based on CMOS inverters only and op... more A new Combiner architecture for direct conversion transmitter based on CMOS inverters only and operating in transconductance mode is presented in this paper. Typical applications of an adder and a subtractor of two small amplitude signals are proposed to illustrate the circuit capabilities. The proposed circuit operation has been acted from measurements with the HCC/HCF4069UB Hex Inverter from the SGS
CMOS instrumentation-amplifier based on ASKA cell
Proceedings of the 8th IEEE International NEWCAS Conference 2010, 2010
A modified Aska current-mode instrumentation amplifier (IA) is proposed in this paper. The main m... more A modified Aska current-mode instrumentation amplifier (IA) is proposed in this paper. The main modification consists to add of a current negative impedance converter (INIC) in order to cancel the input current offset. The proposed configuration has been simulated using typical transistor parameters of the 0.35μm CMOS process from AMS. Under ±1.5V supply voltage, the circuit consumes 1.65mW. The IA exhibits a sensibility of 2, 3mV per Ω. In the same simulation condition, the sensibility deviation is lower than 0.0017% in the case of a resistive sensor having an impedance variation between 990Ω and 1010Ω.
Low noise micro-power chopper amplifier for MEMS gas sensor
In this paper, a low-noise, low-power and low voltage Chopper Stabilized CMOS Amplifier (CHS-A) i... more In this paper, a low-noise, low-power and low voltage Chopper Stabilized CMOS Amplifier (CHS-A) is presented and simulated using transistor model parameters of the AMS 0.35 μm CMOS process. This CHS-A is dedicated to high resistive gas sensor detection. The proposed CHS-A using Chopper Stabilization technique (CHS) exhibits an equivalent input referred noise of only 0.194 / nV Hz for a chopping frequency of 210 kHz under 1.25 V supply voltage and 26.5 dB voltage gain. At the same simulation condition, the total power consumption is 5 μW only.
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Papers by Stéphane Meillère