international journal of engineering trends and technology, 2014
Turbo code has become the coding technique of choice in many communication and storage systems du... more Turbo code has become the coding technique of choice in many communication and storage systems due to its near Shannon limit error correction capability. With requirement on increasing data rates for deep space mission, it is required to have efficient encoder and decoder. Turbo codes provide up to 0.8 dB improvement in Eb/No over the current best codes used by deep space missions. The total number of decoder iterations depends on the physical channel characteristics. In this paper, we proposed a turbo encoder with the 1/3,1/4,1/6 rate and turbo decoder.
Multiplication is frequently required in digital signal processing. Parallel multipliers provide ... more Multiplication is frequently required in digital signal processing. Parallel multipliers provide a high-speed method for multiplication, but require large area for VLSI implementations. In most signal processing applications, a rounded product is desired to avoid growth in word size. Thus an important design goal is to reduce the area requirement of the rounded output multiplier. This paper presents a method for parallel multiplication which computes the products of two n-bit numbers by summing only the most significant columns with a variable correction method. This paper also presents a comparative study of Field Programmable Gate Array (FPGA) implementation of 8X8 standard and truncated multipliers using Very High Speed Integrated Circuit Hardware Description Language (VHDL). Truncated multipliers can be used in finite impulse response (FIR) and discrete cosine transforms (DCT). The truncated multiplier shows much more reduction in device utilization as compared to standard multiplier. Significant reduction in FPGA resources, delay, and power can be achieved using truncated multipliers instead of standard parallel multipliers when the full precision of the standard multiplier is not required.
Vedic Mathematics is the ancient system of mathematics which has a unique technique of calculatio... more Vedic Mathematics is the ancient system of mathematics which has a unique technique of calculation based on 16 formula (sutras). The word Vedic is desired from word Veda which store house of all knowledge. As the ever increasing demand in enhancing the ability of coprocessor to handle the complex and challenging processor as resulted in integration of number of processor cores into single chip, but still the load on the processor is not less in generic system. This load is reduced by connecting the main processor with co processor, which are designed to work on the specific types of function like numeric computation, signal processing, image processing and arithmetic operation. The speed of arithmetic is of extreme importance and depends greatly on the speed of multiplier. Therefore the technologies are always looking for new algorithm and hardware so as to implement this operation in much optimized way in the terms of area and speed. Vedic Mathematics deals with various branches of...
Multiplication is frequently required in digital signal processing. Parallel multipliers provide ... more Multiplication is frequently required in digital signal processing. Parallel multipliers provide a high-speed method for multiplication, but require large area for VLSI implementations. In most signal processing applications, a rounded product is desired to avoid growth in word size. Thus an important design goal is to reduce the area requirement of the rounded output multiplier. This paper presents a method for parallel multiplication which computes the products of two n-bit numbers by summing only the most significant columns with a variable correction method. This paper also presents a comparative study of Field Programmable Gate Array (FPGA) implementation of 8X8 standard and truncated multipliers using Very High Speed Integrated Circuit Hardware Description Language (VHDL). Truncated multipliers can be used in finite impulse response (FIR) and discrete cosine transforms (DCT). The truncated multiplier shows much more reduction in device utilization as compared to standard multi...
2009 Second International Conference on Emerging Trends in Engineering & Technology, 2009
UWB (Ultra Wide Band) technology is a reliable transmission scheme for wireless communication wit... more UWB (Ultra Wide Band) technology is a reliable transmission scheme for wireless communication with high data rates. It is called as impulse radio, impulse radar or carrier free ultra high resolution .UWB occupies a bandwidth of more than 25% of a center frequency, or more than 1.5GHz. It is a carrier free (base band) technique, which will greatly reduce the complexity and cost of transceiver. UWB can be characterized with ultra short duration pulses called monopulse which has excellent immunity in interference from sensitivity or multipath effects or fading problem. In this paper we examine different types of pulse shaping, modulation techniques and different types of demodulation are simulated and evaluated the BER(bit error rate) in the presence of the AWGN (additive white Gaussian noise). In this paper BER are Compared to examine the best modulation technique with monopulse.
international journal of engineering trends and technology, 2014
Turbo code has become the coding technique of choice in many communication and storage systems du... more Turbo code has become the coding technique of choice in many communication and storage systems due to its near Shannon limit error correction capability. With requirement on increasing data rates for deep space mission, it is required to have efficient encoder and decoder. Turbo codes provide up to 0.8 dB improvement in Eb/No over the current best codes used by deep space missions. The total number of decoder iterations depends on the physical channel characteristics. In this paper, we proposed a turbo encoder with the 1/3,1/4,1/6 rate and turbo decoder.
Multiplication is frequently required in digital signal processing. Parallel multipliers provide ... more Multiplication is frequently required in digital signal processing. Parallel multipliers provide a high-speed method for multiplication, but require large area for VLSI implementations. In most signal processing applications, a rounded product is desired to avoid growth in word size. Thus an important design goal is to reduce the area requirement of the rounded output multiplier. This paper presents a method for parallel multiplication which computes the products of two n-bit numbers by summing only the most significant columns with a variable correction method. This paper also presents a comparative study of Field Programmable Gate Array (FPGA) implementation of 8X8 standard and truncated multipliers using Very High Speed Integrated Circuit Hardware Description Language (VHDL). Truncated multipliers can be used in finite impulse response (FIR) and discrete cosine transforms (DCT). The truncated multiplier shows much more reduction in device utilization as compared to standard multiplier. Significant reduction in FPGA resources, delay, and power can be achieved using truncated multipliers instead of standard parallel multipliers when the full precision of the standard multiplier is not required.
Vedic Mathematics is the ancient system of mathematics which has a unique technique of calculatio... more Vedic Mathematics is the ancient system of mathematics which has a unique technique of calculation based on 16 formula (sutras). The word Vedic is desired from word Veda which store house of all knowledge. As the ever increasing demand in enhancing the ability of coprocessor to handle the complex and challenging processor as resulted in integration of number of processor cores into single chip, but still the load on the processor is not less in generic system. This load is reduced by connecting the main processor with co processor, which are designed to work on the specific types of function like numeric computation, signal processing, image processing and arithmetic operation. The speed of arithmetic is of extreme importance and depends greatly on the speed of multiplier. Therefore the technologies are always looking for new algorithm and hardware so as to implement this operation in much optimized way in the terms of area and speed. Vedic Mathematics deals with various branches of...
Multiplication is frequently required in digital signal processing. Parallel multipliers provide ... more Multiplication is frequently required in digital signal processing. Parallel multipliers provide a high-speed method for multiplication, but require large area for VLSI implementations. In most signal processing applications, a rounded product is desired to avoid growth in word size. Thus an important design goal is to reduce the area requirement of the rounded output multiplier. This paper presents a method for parallel multiplication which computes the products of two n-bit numbers by summing only the most significant columns with a variable correction method. This paper also presents a comparative study of Field Programmable Gate Array (FPGA) implementation of 8X8 standard and truncated multipliers using Very High Speed Integrated Circuit Hardware Description Language (VHDL). Truncated multipliers can be used in finite impulse response (FIR) and discrete cosine transforms (DCT). The truncated multiplier shows much more reduction in device utilization as compared to standard multi...
2009 Second International Conference on Emerging Trends in Engineering & Technology, 2009
UWB (Ultra Wide Band) technology is a reliable transmission scheme for wireless communication wit... more UWB (Ultra Wide Band) technology is a reliable transmission scheme for wireless communication with high data rates. It is called as impulse radio, impulse radar or carrier free ultra high resolution .UWB occupies a bandwidth of more than 25% of a center frequency, or more than 1.5GHz. It is a carrier free (base band) technique, which will greatly reduce the complexity and cost of transceiver. UWB can be characterized with ultra short duration pulses called monopulse which has excellent immunity in interference from sensitivity or multipath effects or fading problem. In this paper we examine different types of pulse shaping, modulation techniques and different types of demodulation are simulated and evaluated the BER(bit error rate) in the presence of the AWGN (additive white Gaussian noise). In this paper BER are Compared to examine the best modulation technique with monopulse.
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