Papers by Mohammed Khalid
A Comparison of Profiling Tools for FPGA-Based Embedded Systems
2007 Canadian Conference on Electrical and Computer Engineering, 2007
Page 1. A Comparison of Profiling Tools for FPGA-Based Embedded Systems Jason G. Tong and Mohamme... more Page 1. A Comparison of Profiling Tools for FPGA-Based Embedded Systems Jason G. Tong and Mohammed AS Khalid Research Centre for Integrated Microsystems Department of Electrical and Computer Engineering University ...
Design Space Exploration using Parameterized Cores: A Case Study
2006 Canadian Conference on Electrical and Computer Engineering, 2006
Today, many designers of embedded systems are choosing to build their systems using parameterized... more Today, many designers of embedded systems are choosing to build their systems using parameterized intellectual property (IP) cores, which are hardware or software components which allow certain aspects of their architecture to be changed and set at design-time. Design space exploration (DSE) is the process of determining the best combination of parameter values from the complete set of possible designs.
2006 International Conference on Microelectronics, 2006
A soft-core processor is a hardware description language (HDL) model of a specific processor (CPU... more A soft-core processor is a hardware description language (HDL) model of a specific processor (CPU) that can be customized for a given application and synthesized for an ASIC or FPGA target. In many applications, soft-core processors provide several advantages over custom designed processors such as reduced cost, flexibility, platform independence and greater immunity to obsolescence. Embedded systems are hardware and software components working together to perform a specific function. Usually they contain embedded processors that are often in the form of soft-core processors that execute software code. This paper presents a survey of soft-core processors that are used in embedded systems. Several soft-core processors available from commercial vendors and open-source communities are reviewed and compared based on major architectural features. In addition, several real world examples of embedded systems that employ soft-core processors are summarized. As the complexity of embedded systems continues to increase, it is expected that the usage of customizable soft-core processors will become more widespread.
Profiling CAD tools: A proposed classification
2007 Internatonal Conference on Microelectronics, 2007
Abstract Profiling is the analysis of a software program's behaviour as it is ex... more Abstract Profiling is the analysis of a software program's behaviour as it is executing on a target processor or platform. The purpose is to determine the computational bottleneck so that designers can modify or optimize the software code in order to gain a speed up in ...
Journal of Computers, 2008
Profiling tools are computer-aided design (CAD) tools that help in determining the computationall... more Profiling tools are computer-aided design (CAD) tools that help in determining the computationally intensive portions in software. Embedded systems consist of hardware and software components that execute concurrently and efficiently to execute a specific task or application. Profiling tools are used by embedded system designers to choose computationally intensive functions for hardware implementation and acceleration. In this paper we review and compare various existing profiling tools for FPGA-based embedded systems. We then describe Airwolf, an FPGAbased profiling tool. We present a quantitative comparison of Airwolf and a well known software-based profiling tool, GNU gprof. Four software benchmarks were used to obtain profiling results using Airwolf and gprof. We show that Airwolf provides up to 66.2% improvement in accuracy of profiled results and reduces the run time performance overhead, caused by software-based profiling tools, by up to 41.3%. The results show that Airwolf provides accurate profiling results with minimal overhead and it can help the designers of FPGA-based embedded systems in identifying the computationally intensive portions of software code for hardware implementation and acceleration.
SC Build: a computer-aided design tool for design space exploration of embedded central processing unit cores for field-programmable gate arrays
IET Computers & Digital Techniques, 2009
ABSTRACT A genetic algorithm-based design space exploration technique using parameterised cores i... more ABSTRACT A genetic algorithm-based design space exploration technique using parameterised cores is examined. A computer-aided design tool called SCBuild was developed which is capable of applying a genetic algorithm to a core's parameters, and generating hardware description language models of core variants. The tool can also compute estimates of a variant's area and critical path delay on a field-programmable gate array. Using this tool, several experiments were conducted using a soft-core processor with a large design space. It was concluded from these experiments that using a genetic algorithm to explore the design space of a parameterised core can help a designer make intelligent decisions regarding the assignment of values to the parameters of an embedded hardware platform.
Multi-FPGA systems (MFSs) are used as custom computing machines, logic emulators and rapid protot... more Multi-FPGA systems (MFSs) are used as custom computing machines, logic emulators and rapid prototyping vehicles. A key aspect of these systems is their programmable routing architecture, the manner in which wires, FPGAs and Field-Programmable Interconnect Devices (FPIDs) are connected. In this paper we present an experimental study for evaluating and comparing two commonly used routing architectures for multi-FPGA systems: 8-way mesh and partial crossbar. A set of 15 large benchmark circuits are mapped into these architectures, using a customized set of partitioning, placement and inter-chip routing tools. Particular attention was paid to the development of appropriate interchip routing algorithms for each architecture. The architectures are compared on the basis of cost (the total number of pins required in the system) and speed (determined by post inter-chip routing critical path delay). The results show that the 8-way mesh architecture has high cost, poor routability and speed while the partial crossbar architecture gives relatively low cost, good routability and speed. Using our experimental approach, we also explore a key architecture parameter associated with the partial crossbar architecture, and its impact on the routability and speed of the architecture. We briefly describe an inter-chip router for the partial crossbar architecture, called PCROUTE, that gives excellent routability and speed results for real benchmark circuits.
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Papers by Mohammed Khalid