Papers by Dr. Laxminarayan Gahalod
International Journal of Scientific Research in Science, Engineering and Technology
The integrity of received data is a critical consideration in the design of digital communication... more The integrity of received data is a critical consideration in the design of digital communications and storage systems. The technique involved in attaining data reliability while transmission over a wireless channel is to use Channel Coding. These coding methods involve the use of Error Control Codes and there are two basic ways of controlling errors. They are Automatic Repeat Request and Forward Error Correction. This thesis concentrates on Forward error correction that deals with error detection and error correction. There are two types of error control codes: Block Codes and Convolutional Codes. The extent to which the errors are detected is a measure of the success of the code. The main trade-off in the error correction/detection technique lies in the key parameters involved in evaluating a coding system. Various block codes are analyzed using the performance metrics, namely, Improvement ratio and Error Resilience. It is observed that Cyclic Redundancy Check (CRC) codes showed b...
With the ongoing digital revolution and advances in high performance computing, powerful desktop ... more With the ongoing digital revolution and advances in high performance computing, powerful desktop computer systems are available to almost everybody at low cost. While there has always been a demand for hardware implementations of public key cryptography, the volume has risen dramatically in recent years, due to a paradigm. Because of its complexity, public–key cryptography is mainly used for digital signatures and the management of secret keys between two points. The encryption of bulk data is mainly established with secret–key cryptosystems, whereas the secret keys to be shared for a pair of users are distributed by public–key cryptosystems. Increasing demand for modular multiplication requires fast modular multiplication algorithms such as Montgomery multiplication the implementation, verification and testing of a Montgomery modular multiplication algorithm for the new efficient area and delay profile architecture of asynchronous parallel self timed adder based Montgomery multipli...
In VLSI circuits and systems. Due to relatively high complexity of VLSI systems used in various a... more In VLSI circuits and systems. Due to relatively high complexity of VLSI systems used in various applications, the power dissipation in CMOS inverter arises from its switching activity, which is mainly influenced by the supply voltage and effective capacitance. One of challenge with technology scaling is the rapid increase in sub threshold leakage power due to Vt reduction. Leakage power dissipation is a component of static power dissipation in CMOS circuits. It is caused by the presence of leakage currents in the MOS transistors. Leakage power can be reduce by Stack, Sleep and Sleepy keeper transistor techniques. Sleepy Keeper technique provided lesser static power dissipation and lesser static power delay product in comparison with the other techniques. The main advantage of using Sleepy Keeper technique is that it retains the logic state and also lowers the sub threshold leakage power dissipation. It has been shown previously that the stacking of two off transistors has significan...
International Journal of Scientific Research in Science, Engineering and Technology
In this paper certain optimization techniques are proposed to reduce the encoder and decoder comp... more In this paper certain optimization techniques are proposed to reduce the encoder and decoder computation time of cache memory that is affected by soft error and by implementing ECC such as cyclic and block codes. Error that is adjacent by a width of three and two bits are the prime concern of this thesis. Optimised Golay code (23, 12) and new block code size (32, 19) which is also optimised are presented. Nevertheless, cyclic code is efficient compared with block code however, the prime concern of the thesis is to address the triple and double adjacent errors which also includes single bit error, in this regard built-in capability of Golay code is optimised and used for comparison. The extended Golay code is implemented in term of number of slice, number of LUT and maximum combinational path delay compared with existing Golay code.
A Review on Digital Image Watermarking using 3-Level Discrete Wavelet Transform
International journal of scientific research in science, engineering and technology, 2018
The rapid expansion of internet in the past years has rapidly increased the availability of digit... more The rapid expansion of internet in the past years has rapidly increased the availability of digital data such as audio, images and videos to the public. The problem of protecting multimedia information becomes more important. A lot of copyright owners are concerned about protecting any illegal duplication of their data or work. This is an interesting challenge and this is probably why so much attention has been drawn toward the development of digital images protection schemes. Digital image watermarking technique solves this problem to the great extent. This paper incorporates different techniques of digital image watermarking and the comparison of various performance criteria of digital image.
In VLSI circuits and systems. Due to relatively high complexity of VLSI systems used in various a... more In VLSI circuits and systems. Due to relatively high complexity of VLSI systems used in various applications, the power dissipation in CMOS inverter arises from its switching activity, which is mainly influenced by the supply voltage and effective capacitance. One of challenge with technology scaling is the rapid increase in sub threshold leakage power due to Vt reduction. Leakage power dissipation is a component of static power dissipation in CMOS circuits. It is caused by the presence of leakage currents in the MOS transistors. Leakage power can be reduce by Stack, Sleep and Sleepy keeper transistor techniques. Sleepy Keeper technique provided lesser static power dissipation and lesser static power delay product in comparison with the other techniques. The main advantage of using Sleepy Keeper technique is that it retains the logic state and also lowers the sub threshold leakage power dissipation. It has been shown previously that the stacking of two off transistors has significan...
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Papers by Dr. Laxminarayan Gahalod