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Issam Damaj

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Duke University

University of Haifa

University of New Mexico

Higher Technological Institute

Universiti Malaysia Perlis (UniMAP)

Nenad Makuljevic

Filozofski fakultet Beograd

Raquel Coelho Gomes Pinto

Instituto Militar de Engenharia (IME)

Ali E. Abdallah

Birmingham City University

Umm Al-Qura University, Makkah, Saudi Arabia

University of East London

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Papers by Issam Damaj

A survey on blockchain-based Recommender Systems: Integration architecture and taxonomy

Computer Communications

Multigrid Solvers in Reconfigurable Hardware

The problem of finding the solution of Partial Differential Equations (PDEs) plays a central role... more The problem of finding the solution of Partial Differential Equations (PDEs) plays a central role in modeling real world problems. Over the past years, Multigrid solvers have showed their robustness over other techniques, due to its high convergence rate which is independent of the problem size. For this reason, many attempts for exploiting the inherent parallelism of Multigrid have been made to achieve the desired efficiency and scalability of the method. Yet, most efforts fail in this respect due to many factors (time, resources) governed by software implementations. In this paper, we present a hardware implementation of the V-cycle Multigrid method for finding the solution of a 2D-Poisson equation. We use Handel-C to implement our hardware design, which we map onto available Field Programmable Gate Arrays (FPGAs). We analyze the implementation performance using the FPGA vendor's tools. We demonstrate the robustness of Multigrid over other iterative solvers, such as Jacobi and...

Parallel Algorithms Development for Programmable Devices with Application from Cryptography

Reconfigurable devices, such as Field Programmable Gate Arrays (FPGAs), have been witnessing a co... more Reconfigurable devices, such as Field Programmable Gate Arrays (FPGAs), have been witnessing a considerable increase in density. State-of-the-art FPGAs are complex hybrid devices that contain up to several millions of gates. Recently, research effort has been going into higher-level parallelization and hardware synthesis methodologies that can exploit such a programmable technology. In this paper, we explore the effectiveness of one such formal methodology in the design of parallel versions of the Serpent cryptographic algorithm. The suggested methodology adopts a functional programming notation for specifying algorithms and for reasoning about them. The specifications are realized through the use of a combination of function decomposition strategies, data refinement techniques, and off-the-shelf refinements based upon higher-order functions. The refinements are inspired by the operators of Communicating Sequential Processes (CSP) and map easily to programs in Handel-C (a hardware d...

Smart Cart: A Ubiquitous Shopping Guidance System

CALL FOR PAPERS: IEEE TRANSACTIONS ON EDUCATION Special Issue on Project-Based, Senior Design, and Capstone Courses in Engineering Education

Programmable Logic Arrays

Programmable logic arrays (PLAs) are traditional digital electronic devices. A PLA is a simple pr... more Programmable logic arrays (PLAs) are traditional digital electronic devices. A PLA is a simple programmable logic device (SPLD) used to implement combinational logic circuits. A PLA has a set of programmable AND gates, which link to a set of programmable OR gates to produce an output. The AND-OR layout of a PLA allows for implementing logic functions that are in a sum-of-products form. PLAs are available in the market in different types. PLAs could be stand alone chips, or parts of bigger processing systems. Stand alone PLAs are available as mask programmable (MPLAs) and field programmable (FPLAs) devices. The attractions of PLAs that brought them to mainstream engineers include their simplicity, relatively small circuit area, predictable propagation delay, and ease of development. The powerful-but-simple property brought PLAs to rapid prototyping, synthesis, design optimization techniques, embedded systems, traditional computer systems, hybrid high-performance computing systems, et...

High-level Synthesis

Hardware synthesis is a general term used to refer to the processes involved in automatically gen... more Hardware synthesis is a general term used to refer to the processes involved in automatically generating a hardware design from its specification. High-level synthesis (HLS) could be defined as the translation from a behavioral description of the intended hardware circuit into a structural description similar to the compilation of programming languages (such as C and Pascal into assembly language. The chained synthesis tasks at each level of the design process include system synthesis, register-transfer synthesis, logic synthesis, and circuit synthesis. The development of hardware solutions for complex applications is no more a complicated task with the emergence of various HLS tools. Many areas of application have benefited from the modern advances in hardware design, such as automotive and aerospace industries, computer graphics, signal and image processing, security, complex simulations like molecular modeling, and DND matching. The field of HLS is continuing its rapid growth to ...

Higher-Level Hardware Synthesis of The KASUMI Algorithm

Programmable Logic Devices (PLDs) continue to grow in size and currently contain several millions... more Programmable Logic Devices (PLDs) continue to grow in size and currently contain several millions of gates. At the same time, research effort is going into higher-level hardware synthesis methodologies for reconfigurable computing that can exploit PLD technology. In this paper, we explore the effectiveness and extend one such formal methodology in the design of massively parallel algorithms. We take a step-wise refinement approach to the development of correct reconfigurable hardware circuits from formal specifications. A functional programming notation is used for specifying algorithms and for reasoning about them. The specifications are realised through the use of a combination of function decomposition strategies, data refinement techniques, and off-the-shelf refinements based upon higher-order functions. The off-the-shelf refinements are inspired by the operators of Communicating Sequential Processes (CSP) and map easily to programs in Handel-C (a hardware description language)....

ChildPOPS: A Smart Child Pocket Monitoring and Protection System

The advancements in Internet of things (IoT) technology is quickly transforming the world into a ... more The advancements in Internet of things (IoT) technology is quickly transforming the world into a smart network of interoperable devices. Traditional devices are becoming ubiquitous, pervasive, connected, and wearable IoT gadgets. The purpose of this investigation is to develop a smart Child Pocket Monitoring and Protection System (ChildPOPS). ChildPOPS provides a touch of advanced lifestyle by automatically monitoring infant’s health conditions, promoting safe living, and providing an easy-to-deploy system and a user-friendly interface. An IoT Development Model is used to design, represent, and analyze the system through a set of submodels. The main challenges that the proposed system addresses include supporting accurate physiological parameter measurements, remote sensing, and correct detection. This chapter includes studying challenges, such as accurately using the device and the training needed by the users—as related to the adoption of such a modern tool by the target human sub...

Incorporating jigsaw cooperative learning in a signals and systems course

2017 IEEE Global Engineering Education Conference (EDUCON), 2017

This paper investigates incorporating jigsaw cooperative learning and its impact on students'... more This paper investigates incorporating jigsaw cooperative learning and its impact on students' performance in a junior-level engineering course on Signals and Systems. This course is rich in mathematical formulation and analysis of complex processes. To make the material more approachable to students, instructors usually incorporate several problem-solving or tutorial sessions within the course. Much like traditional lectures, the delivery of the material during these sessions is primarily instructor-centered, particularly, due to the complexity of the material. In this paper, we demonstrate that student learning of the course material improves when the traditional instructor-centered lectures are supplemented with jigsaw-based problem-solving sessions. Analysis of assessment data obtained from student scores in exam questions over two years shows improvements in student performance when the material delivery is supplemented with jigsaw-based problem-solving sessions in compariso...

AmIE: An Ambient Intelligent Environment for Assisted Living

2019 Advances in Science and Engineering Technology International Conferences (ASET), 2019

In the modern world of technology Internet-of-things (IoT) systems strives to provide an extensiv... more In the modern world of technology Internet-of-things (IoT) systems strives to provide an extensive interconnected and automated solutions for almost every life aspect. This paper proposes an IoT context-aware system to present an Ambient Intelligence (AmI) environment; such as an apartment, house, or a building; to assist blind, visually-impaired, and elderly people. The proposed system aims at providing an easy-to-utilize voice-controlled system to locate, navigate and assist users indoors. The main purpose of the system is to provide indoor positioning, assisted navigation, outside weather information, room temperature, people availability, phone calls and emergency evacuation when needed. The system enhances the user’s awareness of the surrounding environment by feeding them with relevant information through a wearable device to assist them. In addition, the system is voice-controlled in both English and Arabic languages and the information are displayed as audio messages in both...

Efficient Tiny Hardware Cipher under Verilog

Embedded hardware security has been an increasingly important need for many modern general and sp... more Embedded hardware security has been an increasingly important need for many modern general and specific purposes electronic systems. Minute security algorithms with their expected low-cost and high-speed corresponding hardware realizations are of particular interest to fields such as mobile telecommunications, handheld computing devices, etc. In this paper, we analyze and evaluate the development of a cheap and relatively fast hardware implementation of the extended tiny encryption algorithm (XTEA). The development will start by modeling the system using finite state machines (FSMs) and will use Verilog hardware description language to describe the design. Minimizing the chip area will be our primary target rather than the construction of a multi-way massively parallel implementation with its expected high-speed and large silicon area. Many hardware design tools are used to try reaching the best possible optimized syntheses. The targeted hardware systems are the reconfigurable Alter...

All-in-One Pass NFC Wallet

Review of Governance Policies and Practices in Lebanese Higher-Education Institutions

Introduction Over the years, digital electronic systems have progressed from vacuum-tube to compl... more Introduction Over the years, digital electronic systems have progressed from vacuum-tube to complex integrated circuits, some of which contain millions of transistors. Electronic circuits can be separated into two groups, digital and analog circuits. Analog circuits operate on analog quantities that are continuous in value and in time, while digital circuits operate on digital quantities that are discrete in value and time (1).

GPS-Based Vehicle Tracking System-on-Chip

Modern powerful reconfigurable systems are suited in the implementation of various data-stream, d... more Modern powerful reconfigurable systems are suited in the implementation of various data-stream, data-parallel, and other applications. An application that needs real-time, fast, and reliable data processing is the global positioning system (GPS)-based vehicle tracking system (VTS). In this paper, we build on a recently produced VTS (The Aram Locator) offering a system-on-chip (SOC) replacement of the current microcontroller-based implementation. The proposed SOC is built on a field programmable gate array (FPGA) promising a cheaper design, a more cohesive architecture, a faster processing time and an enhanced system interaction. Different designs, and their hardware implementations, are proposed with different levels of integration. Performance analysis and evaluation of the investigated designs are included.

AmIE: An Ambient Intelligent Environment for Blind and Visually Impaired People

The Internet of things (IoT) is a revolutionary technology that is rapidly changing our world. Io... more The Internet of things (IoT) is a revolutionary technology that is rapidly changing our world. IoT systems are becoming essential in modern life; traditional devices are becoming ubiquitous, connected, wireless, and smart. The aim of this investigation is to develop an IoT context-aware system that creates an Ambient Intelligence environment; in an apartment, house, or a building; to assist blind, visually-impaired, and elderly people. The main challenges that the system addresses include supporting assisted navigation, communication, security, and safe-living at an affordable cost. The proposed solution aims at providing effective indoor navigation, an easy-to-deploy system, a multilingual user-friendly interface and supports speech instructions. The proposed system is supported by sensors, communication nodes, control processors, wireless Internet access, a smart watch, to name but a few. The chapter includes studying the effectiveness of adding Bluetooth low energy devices at doo...

Abstract—modern Powerful Reconfigurable Systems Are Suited in the Implementation of Various Data-stream, Data- Parallel, and Other Applications. an Application That Needs Real-time, Fast, and Reliable Data Processing Is the Global Positioning System (gps)-based Vehicle Tracking System (vts). in This

replacement of the current microcontroller-based implementation. The proposed SOC is built on a f... more replacement of the current microcontroller-based implementation. The proposed SOC is built on a field programmable gate array (FPGA) promising a cheaper design, a more cohesive architecture, a faster processing time and an enhanced system interaction. Different designs, and their hardware implementations, are proposed with different levels of integration. Performance analysis and evaluation of the investigated designs are included.

A Survey on Accessible Context-Aware Systems

At the present time, 15% of the growing world population is estimated to have disabilities and sp... more At the present time, 15% of the growing world population is estimated to have disabilities and special needs. Disabilities can seriously limit participation in regular life activities, such as controlling home facilities, using transportation services, joining social events, accessing educational contents, to name but a few. With the advancement in ubiquitous and pervasive computing, context-aware systems (CAS) are gaining much attention and demonstrating a stronger association with applications for people with disability. Modern CAS tend to minimize user interactions with the system and provide seamless services, automated awareness, and ambient intelligence and monitoring. CAS for people with disability can detect the surrounding environment, identify an appropriate user interface, interact, and service the user depending on the situation. Nevertheless, a large number of investigations on CAS for people with disability are presented in the literature, limited systems are practical...

A maximum mutuality model for continuous improvement in engineering departments

In higher education, academic departments are always challenged by the need to succeed in operati... more In higher education, academic departments are always challenged by the need to succeed in operation while maintaining quality practices and outputs. It is common that departments need to adhere to multiple accreditation initiatives and standards at both the institutional and programmatic levels. In this paper, we benefit from the intersection between the improvement cycles of institutional and programmatic accreditations to propose a maximum mutuality model. The suggested model embeds program reviews, as required by ABET accreditation, within a departmental improvement loop. The model aims at being effective, productive, and easy-to-deploy; while responding to the needs for improvement at various levels. The application of the model is shown to be successful in assuring quality and leading to different accreditations. The paper includes thorough analysis, evaluation, and deployment results over six academic years.

A survey on blockchain-based Recommender Systems: Integration architecture and taxonomy

Computer Communications

Multigrid Solvers in Reconfigurable Hardware

The problem of finding the solution of Partial Differential Equations (PDEs) plays a central role... more The problem of finding the solution of Partial Differential Equations (PDEs) plays a central role in modeling real world problems. Over the past years, Multigrid solvers have showed their robustness over other techniques, due to its high convergence rate which is independent of the problem size. For this reason, many attempts for exploiting the inherent parallelism of Multigrid have been made to achieve the desired efficiency and scalability of the method. Yet, most efforts fail in this respect due to many factors (time, resources) governed by software implementations. In this paper, we present a hardware implementation of the V-cycle Multigrid method for finding the solution of a 2D-Poisson equation. We use Handel-C to implement our hardware design, which we map onto available Field Programmable Gate Arrays (FPGAs). We analyze the implementation performance using the FPGA vendor's tools. We demonstrate the robustness of Multigrid over other iterative solvers, such as Jacobi and...

Parallel Algorithms Development for Programmable Devices with Application from Cryptography

Reconfigurable devices, such as Field Programmable Gate Arrays (FPGAs), have been witnessing a co... more Reconfigurable devices, such as Field Programmable Gate Arrays (FPGAs), have been witnessing a considerable increase in density. State-of-the-art FPGAs are complex hybrid devices that contain up to several millions of gates. Recently, research effort has been going into higher-level parallelization and hardware synthesis methodologies that can exploit such a programmable technology. In this paper, we explore the effectiveness of one such formal methodology in the design of parallel versions of the Serpent cryptographic algorithm. The suggested methodology adopts a functional programming notation for specifying algorithms and for reasoning about them. The specifications are realized through the use of a combination of function decomposition strategies, data refinement techniques, and off-the-shelf refinements based upon higher-order functions. The refinements are inspired by the operators of Communicating Sequential Processes (CSP) and map easily to programs in Handel-C (a hardware d...

Smart Cart: A Ubiquitous Shopping Guidance System

CALL FOR PAPERS: IEEE TRANSACTIONS ON EDUCATION Special Issue on Project-Based, Senior Design, and Capstone Courses in Engineering Education

Programmable Logic Arrays

Programmable logic arrays (PLAs) are traditional digital electronic devices. A PLA is a simple pr... more Programmable logic arrays (PLAs) are traditional digital electronic devices. A PLA is a simple programmable logic device (SPLD) used to implement combinational logic circuits. A PLA has a set of programmable AND gates, which link to a set of programmable OR gates to produce an output. The AND-OR layout of a PLA allows for implementing logic functions that are in a sum-of-products form. PLAs are available in the market in different types. PLAs could be stand alone chips, or parts of bigger processing systems. Stand alone PLAs are available as mask programmable (MPLAs) and field programmable (FPLAs) devices. The attractions of PLAs that brought them to mainstream engineers include their simplicity, relatively small circuit area, predictable propagation delay, and ease of development. The powerful-but-simple property brought PLAs to rapid prototyping, synthesis, design optimization techniques, embedded systems, traditional computer systems, hybrid high-performance computing systems, et...

High-level Synthesis

Hardware synthesis is a general term used to refer to the processes involved in automatically gen... more Hardware synthesis is a general term used to refer to the processes involved in automatically generating a hardware design from its specification. High-level synthesis (HLS) could be defined as the translation from a behavioral description of the intended hardware circuit into a structural description similar to the compilation of programming languages (such as C and Pascal into assembly language. The chained synthesis tasks at each level of the design process include system synthesis, register-transfer synthesis, logic synthesis, and circuit synthesis. The development of hardware solutions for complex applications is no more a complicated task with the emergence of various HLS tools. Many areas of application have benefited from the modern advances in hardware design, such as automotive and aerospace industries, computer graphics, signal and image processing, security, complex simulations like molecular modeling, and DND matching. The field of HLS is continuing its rapid growth to ...

Higher-Level Hardware Synthesis of The KASUMI Algorithm

Programmable Logic Devices (PLDs) continue to grow in size and currently contain several millions... more Programmable Logic Devices (PLDs) continue to grow in size and currently contain several millions of gates. At the same time, research effort is going into higher-level hardware synthesis methodologies for reconfigurable computing that can exploit PLD technology. In this paper, we explore the effectiveness and extend one such formal methodology in the design of massively parallel algorithms. We take a step-wise refinement approach to the development of correct reconfigurable hardware circuits from formal specifications. A functional programming notation is used for specifying algorithms and for reasoning about them. The specifications are realised through the use of a combination of function decomposition strategies, data refinement techniques, and off-the-shelf refinements based upon higher-order functions. The off-the-shelf refinements are inspired by the operators of Communicating Sequential Processes (CSP) and map easily to programs in Handel-C (a hardware description language)....

ChildPOPS: A Smart Child Pocket Monitoring and Protection System

The advancements in Internet of things (IoT) technology is quickly transforming the world into a ... more The advancements in Internet of things (IoT) technology is quickly transforming the world into a smart network of interoperable devices. Traditional devices are becoming ubiquitous, pervasive, connected, and wearable IoT gadgets. The purpose of this investigation is to develop a smart Child Pocket Monitoring and Protection System (ChildPOPS). ChildPOPS provides a touch of advanced lifestyle by automatically monitoring infant’s health conditions, promoting safe living, and providing an easy-to-deploy system and a user-friendly interface. An IoT Development Model is used to design, represent, and analyze the system through a set of submodels. The main challenges that the proposed system addresses include supporting accurate physiological parameter measurements, remote sensing, and correct detection. This chapter includes studying challenges, such as accurately using the device and the training needed by the users—as related to the adoption of such a modern tool by the target human sub...

Incorporating jigsaw cooperative learning in a signals and systems course

2017 IEEE Global Engineering Education Conference (EDUCON), 2017

This paper investigates incorporating jigsaw cooperative learning and its impact on students'... more This paper investigates incorporating jigsaw cooperative learning and its impact on students' performance in a junior-level engineering course on Signals and Systems. This course is rich in mathematical formulation and analysis of complex processes. To make the material more approachable to students, instructors usually incorporate several problem-solving or tutorial sessions within the course. Much like traditional lectures, the delivery of the material during these sessions is primarily instructor-centered, particularly, due to the complexity of the material. In this paper, we demonstrate that student learning of the course material improves when the traditional instructor-centered lectures are supplemented with jigsaw-based problem-solving sessions. Analysis of assessment data obtained from student scores in exam questions over two years shows improvements in student performance when the material delivery is supplemented with jigsaw-based problem-solving sessions in compariso...

AmIE: An Ambient Intelligent Environment for Assisted Living

2019 Advances in Science and Engineering Technology International Conferences (ASET), 2019

In the modern world of technology Internet-of-things (IoT) systems strives to provide an extensiv... more In the modern world of technology Internet-of-things (IoT) systems strives to provide an extensive interconnected and automated solutions for almost every life aspect. This paper proposes an IoT context-aware system to present an Ambient Intelligence (AmI) environment; such as an apartment, house, or a building; to assist blind, visually-impaired, and elderly people. The proposed system aims at providing an easy-to-utilize voice-controlled system to locate, navigate and assist users indoors. The main purpose of the system is to provide indoor positioning, assisted navigation, outside weather information, room temperature, people availability, phone calls and emergency evacuation when needed. The system enhances the user’s awareness of the surrounding environment by feeding them with relevant information through a wearable device to assist them. In addition, the system is voice-controlled in both English and Arabic languages and the information are displayed as audio messages in both...

Efficient Tiny Hardware Cipher under Verilog

Embedded hardware security has been an increasingly important need for many modern general and sp... more Embedded hardware security has been an increasingly important need for many modern general and specific purposes electronic systems. Minute security algorithms with their expected low-cost and high-speed corresponding hardware realizations are of particular interest to fields such as mobile telecommunications, handheld computing devices, etc. In this paper, we analyze and evaluate the development of a cheap and relatively fast hardware implementation of the extended tiny encryption algorithm (XTEA). The development will start by modeling the system using finite state machines (FSMs) and will use Verilog hardware description language to describe the design. Minimizing the chip area will be our primary target rather than the construction of a multi-way massively parallel implementation with its expected high-speed and large silicon area. Many hardware design tools are used to try reaching the best possible optimized syntheses. The targeted hardware systems are the reconfigurable Alter...

All-in-One Pass NFC Wallet

Review of Governance Policies and Practices in Lebanese Higher-Education Institutions

Introduction Over the years, digital electronic systems have progressed from vacuum-tube to compl... more Introduction Over the years, digital electronic systems have progressed from vacuum-tube to complex integrated circuits, some of which contain millions of transistors. Electronic circuits can be separated into two groups, digital and analog circuits. Analog circuits operate on analog quantities that are continuous in value and in time, while digital circuits operate on digital quantities that are discrete in value and time (1).

GPS-Based Vehicle Tracking System-on-Chip

Modern powerful reconfigurable systems are suited in the implementation of various data-stream, d... more Modern powerful reconfigurable systems are suited in the implementation of various data-stream, data-parallel, and other applications. An application that needs real-time, fast, and reliable data processing is the global positioning system (GPS)-based vehicle tracking system (VTS). In this paper, we build on a recently produced VTS (The Aram Locator) offering a system-on-chip (SOC) replacement of the current microcontroller-based implementation. The proposed SOC is built on a field programmable gate array (FPGA) promising a cheaper design, a more cohesive architecture, a faster processing time and an enhanced system interaction. Different designs, and their hardware implementations, are proposed with different levels of integration. Performance analysis and evaluation of the investigated designs are included.

AmIE: An Ambient Intelligent Environment for Blind and Visually Impaired People

The Internet of things (IoT) is a revolutionary technology that is rapidly changing our world. Io... more The Internet of things (IoT) is a revolutionary technology that is rapidly changing our world. IoT systems are becoming essential in modern life; traditional devices are becoming ubiquitous, connected, wireless, and smart. The aim of this investigation is to develop an IoT context-aware system that creates an Ambient Intelligence environment; in an apartment, house, or a building; to assist blind, visually-impaired, and elderly people. The main challenges that the system addresses include supporting assisted navigation, communication, security, and safe-living at an affordable cost. The proposed solution aims at providing effective indoor navigation, an easy-to-deploy system, a multilingual user-friendly interface and supports speech instructions. The proposed system is supported by sensors, communication nodes, control processors, wireless Internet access, a smart watch, to name but a few. The chapter includes studying the effectiveness of adding Bluetooth low energy devices at doo...

Abstract—modern Powerful Reconfigurable Systems Are Suited in the Implementation of Various Data-stream, Data- Parallel, and Other Applications. an Application That Needs Real-time, Fast, and Reliable Data Processing Is the Global Positioning System (gps)-based Vehicle Tracking System (vts). in This

replacement of the current microcontroller-based implementation. The proposed SOC is built on a f... more replacement of the current microcontroller-based implementation. The proposed SOC is built on a field programmable gate array (FPGA) promising a cheaper design, a more cohesive architecture, a faster processing time and an enhanced system interaction. Different designs, and their hardware implementations, are proposed with different levels of integration. Performance analysis and evaluation of the investigated designs are included.

A Survey on Accessible Context-Aware Systems

At the present time, 15% of the growing world population is estimated to have disabilities and sp... more At the present time, 15% of the growing world population is estimated to have disabilities and special needs. Disabilities can seriously limit participation in regular life activities, such as controlling home facilities, using transportation services, joining social events, accessing educational contents, to name but a few. With the advancement in ubiquitous and pervasive computing, context-aware systems (CAS) are gaining much attention and demonstrating a stronger association with applications for people with disability. Modern CAS tend to minimize user interactions with the system and provide seamless services, automated awareness, and ambient intelligence and monitoring. CAS for people with disability can detect the surrounding environment, identify an appropriate user interface, interact, and service the user depending on the situation. Nevertheless, a large number of investigations on CAS for people with disability are presented in the literature, limited systems are practical...

A maximum mutuality model for continuous improvement in engineering departments

In higher education, academic departments are always challenged by the need to succeed in operati... more In higher education, academic departments are always challenged by the need to succeed in operation while maintaining quality practices and outputs. It is common that departments need to adhere to multiple accreditation initiatives and standards at both the institutional and programmatic levels. In this paper, we benefit from the intersection between the improvement cycles of institutional and programmatic accreditations to propose a maximum mutuality model. The suggested model embeds program reviews, as required by ABET accreditation, within a departmental improvement loop. The model aims at being effective, productive, and easy-to-deploy; while responding to the needs for improvement at various levels. The application of the model is shown to be successful in assuring quality and leading to different accreditations. The paper includes thorough analysis, evaluation, and deployment results over six academic years.