Papers by Harsupreet Kaur
A Two-Dimensional Threshold Voltage Model for Asymmetric Gate Stack Surrounding Gate MOSFET
A two-dimensional analytical model for Asymmetric Gate Stack surrounding gate MOSFET (AsymGaS SGT... more A two-dimensional analytical model for Asymmetric Gate Stack surrounding gate MOSFET (AsymGaS SGT) is presented and its effectiveness in suppressing short channel effects and hot carrier effects is studied. The expressions for potential and electric field have been obtained and the analysis is extended to obtain the threshold voltage and subthreshold slope of the device. The results demonstrate that incorporation
Impact of laterally asymmetric channel and gate stack design on device performance of surrounding gate MOSFETs : A modeling and simulation study
A two-dimensional analytical model is presented to study the impact of LACGAS device on the devic... more A two-dimensional analytical model is presented to study the impact of LACGAS device on the device characteristics. It is demonstrated that LACGAS leads to suppression of short channel effects such as threshold voltage (Vth) roll-off, drain induced barrier lowering (DIBL) and hot carrier effects. It also improves the transport efficiency owing to a greater gate control which is achieved by incorporating the stack architecture. Furthermore, LACGAS design also enables to obtain a high current drivability and enhancement in transconductance.
Asymmetric Gate Stack Surrounding gate Transistor (ASYMGAS SGT): 2-D Analytical Threshold Voltage Model
In the present work, a two-dimensional analytical model for novel device architecture, asymmetric... more In the present work, a two-dimensional analytical model for novel device architecture, asymmetric gate stack surrounding gate transistor (ASYMGAS SGT) is presented and its effectiveness in suppressing short channel effects and hot carrier effects is investigated. The model is developed by solving the Poisson equation in cylindrical coordinates assuming a parabolic potential profile in the radial direction. Using the model, the expressions for potential and electric field have been obtained and the analysis is extended to obtain the threshold voltage of the device. It is demonstrated that besides improving the short channel immunity and hot carrier reliability, incorporation of asymmetric gate stack architecture also leads to enhanced transport efficiency. In order to verify the model, the analytical results have been compared with the simulated data obtained from device simulator ATLAS and a good agreement is found.
Solid-state Electronics, 2007
In the present paper, a two-dimensional (2-D) analytical model for graded channel fully depleted ... more In the present paper, a two-dimensional (2-D) analytical model for graded channel fully depleted cylindrical/surrounding gate MOS-FET (GC FD CGT/SGT) has been developed by solving the Poisson's equation in cylindrical coordinates. An abrupt transition of silicon film doping at the interface has been assumed and the effects of the doping and the lengths of the high and low doped regions have been taken into account. The model is used to obtain the expressions of surface potential and electric field in the two regions. The analysis is extended to obtain the expressions for threshold voltage (V th ) and subthreshold swing. It is shown that a graded doping profile in the channel leads to suppression of short channel effects (SCEs) like threshold voltage roll-off, drain induced barrier lowering (DIBL) and hot carrier effects. The results so obtained have been compared with simulated results obtained using the device simulator ATLAS 3D and are found to be in good agreement.
Temperature dependent analytical model of sub-micron GaN MESFETs for microwave frequency applications
Solid-state Electronics, 2008
In this paper, a temperature dependent analytical model of sub-micron GaN MESFETs for microwave f... more In this paper, a temperature dependent analytical model of sub-micron GaN MESFETs for microwave frequency applications is presented. The contributions from various temperature dependent material parameters are taken into account in order to develop an accurate I–V model along with the effect of gate leakage current on the threshold voltage of the device. The model is further extended to predict
Microelectronics Journal, 2007
An analytical, two-dimensional, stationary model of heat distribution in a broad-area laser is di... more An analytical, two-dimensional, stationary model of heat distribution in a broad-area laser is discussed. In the model the laser is treated as a stack of layers of different thicknesses and thermal conductivities. We show how to adjust the geometry of such a stack to take into account a non-ideal heat sink (made of material of finite thermal conductivity) and thus obtain reliable values of the device temperature. The calculated and measured thermal resistances of an exemplary laser series are compared. Our experiment is based on the analysis of a spectral shift of the laser radiation, which provides information about the mean temperature of the active region. A discussion of different types of bonding imperfections and their influence on the obtained results is provided.
Solid-state Electronics, 2008
A new structural concept, graded channel asymmetric gate stack (GCASYMGAS) SGT has been proposed ... more A new structural concept, graded channel asymmetric gate stack (GCASYMGAS) SGT has been proposed and a two-dimensional analytical model is developed to examine the impact of this structure in suppressing short channel effects and in enhancing the device performance. It is shown that incorporation of ASYMGAS and graded channel designs leads to improved short channel immunity and hot carrier reliability. It is also demonstrated that for GCASYMGAS the average electric field in the channel is enhanced which leads to an increase in the electron velocity thereby improving the carrier transport efficiency. Furthermore, the device characteristics have been studied over a wide range of parameters and bias conditions and it is found that GCASYMGAS offers superior characteristics as compared to UD and GC devices. The results so obtained have been compared with simulated data obtained from the device simulator ATLAS 3D and are found to be in good agreement.
A semi empirical approach for submicron GaN MESFET using an accurate velocity field relationship for high power applications
Microelectronics Journal, 2006
A semi empirical model has been proposed for sub-micron GaN MESFET's to calculate th... more A semi empirical model has been proposed for sub-micron GaN MESFET's to calculate the IV characteristics using an accurate velocity-field relationship obtained by fitting it with the Monte Carlo (MC) simulation. The results so obtained are compared with the experimental ...
A Comparative Analysis Using Modeling and Simulation to Study the Impact of Multilayered Gate Dielectric (MGD) Design on Device Performance of Surrounding Gate MOSFET
In the present work, a two-dimensional analytical model is presented to study the impact of multi... more In the present work, a two-dimensional analytical model is presented to study the impact of multi-layered gate dielectric (MGD) design on the device performance of surrounding gate MOSFETs and its effectiveness in suppressing short channel effects and hot carrier effects is investigated. The model is developed by solving the Poisson equation in cylindrical coordinates and is used to obtain the
l. Schematic diagram of (AMGAD L L r z Drain + increased fringing fields from the source/drain re... more l. Schematic diagram of (AMGAD L L r z Drain + increased fringing fields from the source/drain regions which weakens the control of the gate over the channel . Thus, an ultra thin Si02 interlayer between the high-k layer and silicon substrate was introduced which also improves the interface quality and stability . In order to reduce gate leakage, the stacked gate oxide structure, Asymmetric Gate Oxide MOSFET [8-9] was proposed and it was shown that AMGAD SGT also leads to an enhancement in the average electric field in the channel and thus improves the carrier transport efficiency.
Impact of laterally asymmetric channel and gate stack architecture on device performance of surrounding gate MOSFET (LACGAS SGT): A simulation study
In the present work, LACGAS SGT that integrates the advantages of both the LAC and stack architec... more In the present work, LACGAS SGT that integrates the advantages of both the LAC and stack architecture is proposed and its impact on device characteristics is studied using numerical simulations. Using numerical simulations, the novel features of LACGAS SGT have been studied and compared with CON and LAC devices and it has been shown that LACGAS design leads to enhanced device performance in comparison to CON and LAC devices.
Microwave and Optical Technology Letters, 2010
A new device design laterally asymmetric channel gate stack (LACGAS) SGT is proposed, and its imp... more A new device design laterally asymmetric channel gate stack (LACGAS) SGT is proposed, and its impact on device performance is examined. By using analytical modeling and numerical simulations, the novel features of this structure are studied, and it is demonstrated that LACGAS offers superior performance when compared with conventional devices. © 2010 Wiley Periodicals, Inc. Microwave Opt Technol Lett 52: 746–750, 2010; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.25022
An analytical model for admittance parameters of GaN MESFET for microwave circuit applications
... and Techniques, vol. 30, pp. 719-724, 1982. [5] Neti.VL, N.Murthy and S.Jit, “Analytical mode... more ... and Techniques, vol. 30, pp. 719-724, 1982. [5] Neti.VL, N.Murthy and S.Jit, “Analytical modeling of phtoeffects on the S-parameters of GaAs MESFETs,” Microwave and Optical Technology Letters, vol. 48, pp.150-155, 2006.
An analytical model for GaN MESFET's using new velocity-field dependence
Physica Status Solidi (c), 2006
A physical analytical model is developed for the output current voltage characteristics and for d... more A physical analytical model is developed for the output current voltage characteristics and for describing the behavior of electrons in sub-micron GaN MESFET's. A semi-empirical formula has been proposed to approximate the electron drift velocity versus electric field in GaN by fitting it with the Monte Carlo simulation data. It gives a true physical description and an excellent approximation of the velocity field dependence in GaN revealing the presence of a velocity peak which is substantially higher than the saturation velocity at temperature close to 300 K and at typical doping concentration of 1017/cm3. The resulting I-V curves are in excellent agreement with the experimental data. (© 2006 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)
Microwave and Optical Technology Letters, 2007
A semiempirical model of GaN MESFET to evaluate admittance parameters, scattering parameters, max... more A semiempirical model of GaN MESFET to evaluate admittance parameters, scattering parameters, maximum unilateral transducer power gain, and maximum stable gain is presented. Frequency dependence of the parasitic capacitances obtained by simulations has been utilized to develop the model. Results have been verified using ATLAS 2D device simulator and are also compared with parasitic element-dependent model. © 2007 Wiley Periodicals, Inc. Microwave Opt Technol Lett 49: 2446–2450, 2007; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.22744
An analytical drain current model for graded channel cylindrical/surrounding gate MOSFET
Microelectronics Journal, 2007
In the present paper, a comprehensive drain current model incorporating various effects such as d... more In the present paper, a comprehensive drain current model incorporating various effects such as drain-induced barrier lowering (DIBL), channel length modulation and impact ionization has been developed for graded channel cylindrical/surrounding gate MOSFET (GC CGT/SGT) and the expressions for transconductance and drain conductance have been obtained. It is shown that GC design leads to drain current enhancement, reduced output conductance
An analytical model for graded channel (GC) fully depleted cylindrical/surrounding gate SOI MOSFE... more An analytical model for graded channel (GC) fully depleted cylindrical/surrounding gate SOI MOSFET has been developed to study the short channel effects (SCEs). The model assumes a steep transition for silicon film doping at the boundary of high/low doped regions and takes into account the effect of the doping and length of the two regions. The model is used to obtain the expressions of surface potential and electric field in the two regions. The analysis is extended to obtain an expression for threshold voltage (V th )
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Papers by Harsupreet Kaur