The application of pressure sensors in harsh environments is typically hindered by the stability ... more The application of pressure sensors in harsh environments is typically hindered by the stability of the material over long periods of time. This work focuses on the design and fabrication of surface micromachined Pirani gauges which are designed to be compatible with state-ofthe-art Silicon Carbide CMOS technology. Such an integrated platform would boost harsh environment compatibility while reducing the required packaging complexity. An analytical model was derived describing the design variables of the Pirani gauges followed by Finite Element Analysis. The Pirani gauges were fabricated in a CMOS compatible cleanroom with a process employing only three masks, thus suitable for mass production. The SiC-based Pirani gauge is far more competitive than the traditional Si-based Pirani gauge in terms of endurance in high-temperature environments. From 25 • C to 650 • C, the gauge shows a reproducible response to pressure changes and has a maximum sensitivity of 17.63 /Pa at room temperature, and of 1.23 /Pa at 650 • C. Additionally, some of the gauges were demonstrated to operate at temperatures up to 750 • C.
The drive of increased electrical currents to achieve high luminous output for Phosphor-converted... more The drive of increased electrical currents to achieve high luminous output for Phosphor-converted White Light-Emitting Diodes (PW-LED) has led to a series of thermal problems. The light performance of PW-LED is affected by the heat generated by the two major sources in a package/module: chip(s) and phosphors. In this work, spectral shift and consequent color properties change due to the increased temperature during operation were studied by a group of experiments. An electrical-thermal-luminous-chromatic (E-T-L-C) model was then developed to predict the light performance with thermal management under in-situ temperature. The model was then validated by integrated analyses of common LED packages. Besides, the model can also be used to analyze the thermal performance and light quality due to thickness and particle density variation of phosphors. The proposed dynamic E-T-L-C model can definitely benefit the design of future HB LEDs for better light quality.
Heavy metals are often present in water and wastewater as contaminants. From the public health an... more Heavy metals are often present in water and wastewater as contaminants. From the public health and environmental protection point of view, it is important that their concentrations be limited to permissible levels. Technologies for heavy metals removal include ion exchange, chemical precipitation, reverse osmosis, etc. which are often ineffective or expensive. Adsorption is a commonly used method for the removal of heavy metals from aqueous solutions. However, for the process to be economical, the adsorbent should be easily and cheaply available in abundance and it should require minimal or no pre-treatment; for expensive pre-treatment procedures would add to the overall treatment cost. The present study focuses on iron (Fe) removal by adsorption using oil palm by-products (fibre, shell, ash) without pre-treatment or activation. The results show that among the materials tested, ash was the most effective adsorbent. The optimum agitation time and optimum pH were 90 minutes and 5 respectively. The removal followed the Freundlich isotherm closely with R 2 = 0.9479. Desorption of over 98 % was achieved with 0.15 N HCl.
The stress in deposited silicon dioxide and silicon nitride layers that are used in the fabricati... more The stress in deposited silicon dioxide and silicon nitride layers that are used in the fabrication of self-aligned bipolar transistor structures, is evaluated. The intrinsic and thermal stress of the layers is measured and these values are used in a ®nite element process simulator to calculate the pressure in the silicon around the emitter window during processing. Bipolar transistors are fabricated with different combinations of silicon oxide and silicon nitride and the yield of large transistor arrays is compared with the calculated pressure for the different combinations. The presence of a tensile pressure near the emitter coincides with a low measured device yield.
A novel silicon-on-glass integrated bipolar technology is presented. The transfer to glass is per... more A novel silicon-on-glass integrated bipolar technology is presented. The transfer to glass is performed by gluing and subsequent removal of the bulk silicon to a buried oxide layer. Low-ohmic collector contacts are processed on the back-wafer by implantation and dopant activation by excimer laser annealing. The improved electrical isolation with reduced collector-base capacitance, collector resistance and substrate capacitance, also provide an extremely good thermal isolation. The devices are electrothermally characterized in relationship to different heat-spreader designs by electrical measurement and nematic liquid crystal imaging. Accurate values of the temperature at thermal breakdown and thermal resistance are extracted from current-controlled Gummel plot measurements.
High Brightness Light Emit Diodes (HB LEDs) have attract much attention recently with its high ef... more High Brightness Light Emit Diodes (HB LEDs) have attract much attention recently with its high efficiency. However, they are known to be prone to high temperature and high thermo-mechanical induced failure. Since 80% of their input energy is loss as heat, this will heat up the junction temperate to more than 100°C due to joule heating. Furthermore, LED is not designed for AC power input and a driver is needed for LED lamp to convert the AC power from mains to DC power. However, DC supply from the driver is known to fluctuate and this will cause the temperature of the LED to vary and this in turn induced unstable thermal stress. In this work, a simplified thermal pulse is used to mimic this situation. Three situations are simulated: (1) stable heat generation, (2) heat generation with single disturbances, (3) heat generation with multiple disturbances with different frequencies. Results show that driver current fluctuations may result in significant thermal changes and associated mec...
Light-emitting diodes (LEDs) are revolutionizing the illumination with energy savings and enhance... more Light-emitting diodes (LEDs) are revolutionizing the illumination with energy savings and enhanced functionality. However, around 80% of the input power will be still transferred to heat. As the elevated temperature negatively affects the maximum light output, efficiency, quality, reliability and the lifetime of the SSL systems, thermal management is a key design aspect for LED products in terms of cost and performance. LEDs also offer controllability of their spectral, spatial distribution, color temperature, and etc. But the light quality and quantity depend on the temperature stability. In this work, an innovative LED package was manufactured with conventional silicon processing and microelectromechanical systems (MEMS) technology with temperature sensors and microfluidic cooling. A group of sensors could provide the accuracy temperature measurement of LED chip and further controlling. And two-phase cooling in the micro fluid channels is introduced to cool high power LEDs and mai...
One of the critical steps toward producing void-free and uniform bottom-up copper electroplating ... more One of the critical steps toward producing void-free and uniform bottom-up copper electroplating in high aspect-ratio (AR) through-silicon vias (TSVs) is the ability of the copper electrolyte to spontaneously flow through the entire depth of the via. This can be accomplished by reducing the concentration gradient of cupric ions from the via mouth to the via bottom by enhancing the wettability of the vias sidewalls. In this paper, we report on a new dry technique to enhance the hydrophilicity in high AR (~15) TSVs as one of the key solutions to face the mass transport limitation, low pressure chemical vapor deposition silicon nitride and atomic layer deposition titanium nitride of composition SiN0.95 and TiN11, respectively, are used as both barrier layers and wetting surfaces in these vias. Ammonia plasma immersion is used to treat silicon nitride. X-ray photoelectron spectroscopy shows both a partial oxidation and grafting of hydrophilic components. Alternatively, a rapid flood ult...
performance and potential operational issues. Results of numerical simulations conducted to optim... more performance and potential operational issues. Results of numerical simulations conducted to optimize the design of the heating and expansion slots, as well as a detailed description of the manufacturing steps for the conventional micro-resistojet concept, are presented. Some intended steps for future research activities, including options for thrust intensity and direction control, are briefly introduced. Keywords Micro-propulsion • Resistojet • CubeSats • Green propellants List of symbols A S Cross sectional area of one expansion slot (m 2) F T Thrust (N) g 0 Earth's gravitational acceleration at sea level (m/s 2) I sp Specific impulse (s) K Boltzmann constant (J/K) M Total satellite mass (kg) m Mass flow rate (kg/s) M P Propellant mass (kg) M W Molar mass (kg/kmol) N A Avogadro number (-) N S Number of expansion slots (-) p 0 Plenum pressure (Pa) T 0 Plenum temperature (K) T w Heater wall temperature (K) α Transmission coefficient (-) ∆V Delta-V (m/s) * A.
A convenient test structure for measurement of the specific contact resistance (ρc) of metal-semi... more A convenient test structure for measurement of the specific contact resistance (ρc) of metal-semiconductor junctions is the CBKR structure. During last few decades the parasitic factors which may strongly affect the measurements accuracy for ρc < 10-6 Ω • cm2 have been sufficiently discussed and the minimum of the ρc to be measured using CBKR structures was estimated. We fabricated
To validate the Front- To Backwafer Alignment (FTBA) calibration and to investigate process relat... more To validate the Front- To Backwafer Alignment (FTBA) calibration and to investigate process related overlay errors, electrical overlay test structures are used that requires FTBA [1]. Anisotropic KOH etch through the wafer is applied to transfer the backwafer pattern to the frontwafer. Consequently, the crystal orientation introduces an overlay shift. A double exposure method is presented to separate the process-induced
2015 IEEE 65th Electronic Components and Technology Conference (ECTC), 2015
G4 LED lamps have difficulties to reach high lumen output within the required small form factor. ... more G4 LED lamps have difficulties to reach high lumen output within the required small form factor. Current technology used in G4 LED lamps was at first reviewed by analysis of 7 current commercialized products. Theoretical limitation was calculated under different design strategy scenarios. Furthermore, a detailed analysis of driver systems were carried out under thermal infrared imager. It has been found that schottky diodes and capacitors are main challenges for drivers. Since current electrolytic capacitors are bulky and not reliable enough, novel capacitor technologies were further analyzed. Finally, a G4 LED prototype based on wafer level packaging were introduced. The prototype was fabricated in 2D and folded to 3D, in order to save space. All processes related are CMOS compatible. Planar rectifier consists of four schottky diodes which were fabricated separately are compatible for monolithic integration on such foldable substrate. With such technology, it is possible to integrate LED drivers, micro channels for heat dissipation, or other silicon based technologies by CMOS processing, together with the flexible hinges, in order to have a G4 LED package with high lumen output and small form factor.
Journal of Micromechanics and Microengineering, 2015
ABSTRACT Miniaturization of solid state lighting (SSL) luminaires as well as reduction of packagi... more ABSTRACT Miniaturization of solid state lighting (SSL) luminaires as well as reduction of packaging and assembly costs are of prime interest for the SSL lighting industry. A novel silicon based LED package for lighting applications is presented in this paper. The proposed design consists of 5 rigid Si tiles connected by flexible polyimide hinges with embedded interconnects (ICs). Electrical, optical and thermal characteristics were taken into consideration during design. The fabrication process involved polyimide (PI) application and patterning, aluminium interconnect integration in the flexible hinge, LED reflector cavity formation and metalization followed by through wafer DRIE etching for chip formation and release. A method to connect chip front to backside without TSVs was also integrated into the process. Post-fabrication wafer level assembly included LED mounting and wirebond, phosphor-based colour conversion and silicone encapsulation. The package formation was finalized by vacuum assisted wrapping around an assembly structure to form a 3D geometry, which is beneficial for omnidirectional lighting. Bending tests were performed on the flexible ICs and optical performance at different temperatures was evaluated. It is suggested that 3D packages can be expanded to platforms for miniaturized luminaire applications by combining monolithic silicon integration and system-in-package (SiP) technologies.
Miniaturization of solid state lighting (SSL) luminaires as well as reduction of packaging and as... more Miniaturization of solid state lighting (SSL) luminaires as well as reduction of packaging and assembly costs are of prime interest for the SSL lighting industry. A novel silicon based LED package for lighting applications is presented in this paper. The proposed design consists of 5 rigid Si tiles connected by flexible polyimide hinges with embedded interconnects (ICs). Electrical, optical and thermal characteristics were taken into consideration during design. The fabrication process involved polyimide (PI) application and patterning, aluminium interconnect integration in the flexible hinge, LED reflector cavity formation and metalization followed by through wafer DRIE etching for chip formation and release. A method to connect chip front to backside without TSVs was also integrated into the process. Post-fabrication wafer level assembly included LED mounting and wirebond, phosphor-based colour conversion and silicone encapsulation. The package formation was finalized by vacuum as...
2014 44th European Solid State Device Research Conference (ESSDERC), 2014
Recently applying an intelligent self-curing system to get a feedback from the LED light in order... more Recently applying an intelligent self-curing system to get a feedback from the LED light in order to control its intensity with driving current has attracted so much attention. This study presents a silicon stripe-shaped photodiode which is successfully designed and fabricated using a 2μm BiCMOS process. This process flow integrates simultaneously the photodiodes, the CMOS and BJT transistors all in just five masks. In this cheap and smart wafer level LED packaging, fabricated photodiodes demonstrated a very high selectivity to blue light. The maximum responsivity is at 480nm which is matched with the blue LED's illumination. The single-stripe photodiodes due to their higher rate of recombination caused by the dead layer formation at the surface showed lower responsivity compared to multi-stripe ones. The fabricated devices presented a twofold increase in the responsivity and quantum efficiency compared to previously published sensors.
2008 IEEE 21st International Conference on Micro Electro Mechanical Systems, 2008
Advanced deep reactive ion etching (DRIE) with high etch rates (30 mum/min) is achieved by using ... more Advanced deep reactive ion etching (DRIE) with high etch rates (30 mum/min) is achieved by using an etching system with a novel ICP (inductively coupled plasma) source and substrate holder (chuck). Waferstepper dual side lithography (front- to backwater overlay < 500 nm) is used to fabricate electrical overlay test structures in order to measure the non-perpendicularity of the etch profile (angular deviation) and the post etch dimension in a through wafer etch process. Compared with a conventional configuration, the angular deviation is reduced from 0.6 deg to a very low value of 0.2 deg. Furthermore, the accuracy of through wafer etched features is improved from 0.7 % to 0.1 % (one sigma).
The application of pressure sensors in harsh environments is typically hindered by the stability ... more The application of pressure sensors in harsh environments is typically hindered by the stability of the material over long periods of time. This work focuses on the design and fabrication of surface micromachined Pirani gauges which are designed to be compatible with state-ofthe-art Silicon Carbide CMOS technology. Such an integrated platform would boost harsh environment compatibility while reducing the required packaging complexity. An analytical model was derived describing the design variables of the Pirani gauges followed by Finite Element Analysis. The Pirani gauges were fabricated in a CMOS compatible cleanroom with a process employing only three masks, thus suitable for mass production. The SiC-based Pirani gauge is far more competitive than the traditional Si-based Pirani gauge in terms of endurance in high-temperature environments. From 25 • C to 650 • C, the gauge shows a reproducible response to pressure changes and has a maximum sensitivity of 17.63 /Pa at room temperature, and of 1.23 /Pa at 650 • C. Additionally, some of the gauges were demonstrated to operate at temperatures up to 750 • C.
The drive of increased electrical currents to achieve high luminous output for Phosphor-converted... more The drive of increased electrical currents to achieve high luminous output for Phosphor-converted White Light-Emitting Diodes (PW-LED) has led to a series of thermal problems. The light performance of PW-LED is affected by the heat generated by the two major sources in a package/module: chip(s) and phosphors. In this work, spectral shift and consequent color properties change due to the increased temperature during operation were studied by a group of experiments. An electrical-thermal-luminous-chromatic (E-T-L-C) model was then developed to predict the light performance with thermal management under in-situ temperature. The model was then validated by integrated analyses of common LED packages. Besides, the model can also be used to analyze the thermal performance and light quality due to thickness and particle density variation of phosphors. The proposed dynamic E-T-L-C model can definitely benefit the design of future HB LEDs for better light quality.
Heavy metals are often present in water and wastewater as contaminants. From the public health an... more Heavy metals are often present in water and wastewater as contaminants. From the public health and environmental protection point of view, it is important that their concentrations be limited to permissible levels. Technologies for heavy metals removal include ion exchange, chemical precipitation, reverse osmosis, etc. which are often ineffective or expensive. Adsorption is a commonly used method for the removal of heavy metals from aqueous solutions. However, for the process to be economical, the adsorbent should be easily and cheaply available in abundance and it should require minimal or no pre-treatment; for expensive pre-treatment procedures would add to the overall treatment cost. The present study focuses on iron (Fe) removal by adsorption using oil palm by-products (fibre, shell, ash) without pre-treatment or activation. The results show that among the materials tested, ash was the most effective adsorbent. The optimum agitation time and optimum pH were 90 minutes and 5 respectively. The removal followed the Freundlich isotherm closely with R 2 = 0.9479. Desorption of over 98 % was achieved with 0.15 N HCl.
The stress in deposited silicon dioxide and silicon nitride layers that are used in the fabricati... more The stress in deposited silicon dioxide and silicon nitride layers that are used in the fabrication of self-aligned bipolar transistor structures, is evaluated. The intrinsic and thermal stress of the layers is measured and these values are used in a ®nite element process simulator to calculate the pressure in the silicon around the emitter window during processing. Bipolar transistors are fabricated with different combinations of silicon oxide and silicon nitride and the yield of large transistor arrays is compared with the calculated pressure for the different combinations. The presence of a tensile pressure near the emitter coincides with a low measured device yield.
A novel silicon-on-glass integrated bipolar technology is presented. The transfer to glass is per... more A novel silicon-on-glass integrated bipolar technology is presented. The transfer to glass is performed by gluing and subsequent removal of the bulk silicon to a buried oxide layer. Low-ohmic collector contacts are processed on the back-wafer by implantation and dopant activation by excimer laser annealing. The improved electrical isolation with reduced collector-base capacitance, collector resistance and substrate capacitance, also provide an extremely good thermal isolation. The devices are electrothermally characterized in relationship to different heat-spreader designs by electrical measurement and nematic liquid crystal imaging. Accurate values of the temperature at thermal breakdown and thermal resistance are extracted from current-controlled Gummel plot measurements.
High Brightness Light Emit Diodes (HB LEDs) have attract much attention recently with its high ef... more High Brightness Light Emit Diodes (HB LEDs) have attract much attention recently with its high efficiency. However, they are known to be prone to high temperature and high thermo-mechanical induced failure. Since 80% of their input energy is loss as heat, this will heat up the junction temperate to more than 100°C due to joule heating. Furthermore, LED is not designed for AC power input and a driver is needed for LED lamp to convert the AC power from mains to DC power. However, DC supply from the driver is known to fluctuate and this will cause the temperature of the LED to vary and this in turn induced unstable thermal stress. In this work, a simplified thermal pulse is used to mimic this situation. Three situations are simulated: (1) stable heat generation, (2) heat generation with single disturbances, (3) heat generation with multiple disturbances with different frequencies. Results show that driver current fluctuations may result in significant thermal changes and associated mec...
Light-emitting diodes (LEDs) are revolutionizing the illumination with energy savings and enhance... more Light-emitting diodes (LEDs) are revolutionizing the illumination with energy savings and enhanced functionality. However, around 80% of the input power will be still transferred to heat. As the elevated temperature negatively affects the maximum light output, efficiency, quality, reliability and the lifetime of the SSL systems, thermal management is a key design aspect for LED products in terms of cost and performance. LEDs also offer controllability of their spectral, spatial distribution, color temperature, and etc. But the light quality and quantity depend on the temperature stability. In this work, an innovative LED package was manufactured with conventional silicon processing and microelectromechanical systems (MEMS) technology with temperature sensors and microfluidic cooling. A group of sensors could provide the accuracy temperature measurement of LED chip and further controlling. And two-phase cooling in the micro fluid channels is introduced to cool high power LEDs and mai...
One of the critical steps toward producing void-free and uniform bottom-up copper electroplating ... more One of the critical steps toward producing void-free and uniform bottom-up copper electroplating in high aspect-ratio (AR) through-silicon vias (TSVs) is the ability of the copper electrolyte to spontaneously flow through the entire depth of the via. This can be accomplished by reducing the concentration gradient of cupric ions from the via mouth to the via bottom by enhancing the wettability of the vias sidewalls. In this paper, we report on a new dry technique to enhance the hydrophilicity in high AR (~15) TSVs as one of the key solutions to face the mass transport limitation, low pressure chemical vapor deposition silicon nitride and atomic layer deposition titanium nitride of composition SiN0.95 and TiN11, respectively, are used as both barrier layers and wetting surfaces in these vias. Ammonia plasma immersion is used to treat silicon nitride. X-ray photoelectron spectroscopy shows both a partial oxidation and grafting of hydrophilic components. Alternatively, a rapid flood ult...
performance and potential operational issues. Results of numerical simulations conducted to optim... more performance and potential operational issues. Results of numerical simulations conducted to optimize the design of the heating and expansion slots, as well as a detailed description of the manufacturing steps for the conventional micro-resistojet concept, are presented. Some intended steps for future research activities, including options for thrust intensity and direction control, are briefly introduced. Keywords Micro-propulsion • Resistojet • CubeSats • Green propellants List of symbols A S Cross sectional area of one expansion slot (m 2) F T Thrust (N) g 0 Earth's gravitational acceleration at sea level (m/s 2) I sp Specific impulse (s) K Boltzmann constant (J/K) M Total satellite mass (kg) m Mass flow rate (kg/s) M P Propellant mass (kg) M W Molar mass (kg/kmol) N A Avogadro number (-) N S Number of expansion slots (-) p 0 Plenum pressure (Pa) T 0 Plenum temperature (K) T w Heater wall temperature (K) α Transmission coefficient (-) ∆V Delta-V (m/s) * A.
A convenient test structure for measurement of the specific contact resistance (ρc) of metal-semi... more A convenient test structure for measurement of the specific contact resistance (ρc) of metal-semiconductor junctions is the CBKR structure. During last few decades the parasitic factors which may strongly affect the measurements accuracy for ρc < 10-6 Ω • cm2 have been sufficiently discussed and the minimum of the ρc to be measured using CBKR structures was estimated. We fabricated
To validate the Front- To Backwafer Alignment (FTBA) calibration and to investigate process relat... more To validate the Front- To Backwafer Alignment (FTBA) calibration and to investigate process related overlay errors, electrical overlay test structures are used that requires FTBA [1]. Anisotropic KOH etch through the wafer is applied to transfer the backwafer pattern to the frontwafer. Consequently, the crystal orientation introduces an overlay shift. A double exposure method is presented to separate the process-induced
2015 IEEE 65th Electronic Components and Technology Conference (ECTC), 2015
G4 LED lamps have difficulties to reach high lumen output within the required small form factor. ... more G4 LED lamps have difficulties to reach high lumen output within the required small form factor. Current technology used in G4 LED lamps was at first reviewed by analysis of 7 current commercialized products. Theoretical limitation was calculated under different design strategy scenarios. Furthermore, a detailed analysis of driver systems were carried out under thermal infrared imager. It has been found that schottky diodes and capacitors are main challenges for drivers. Since current electrolytic capacitors are bulky and not reliable enough, novel capacitor technologies were further analyzed. Finally, a G4 LED prototype based on wafer level packaging were introduced. The prototype was fabricated in 2D and folded to 3D, in order to save space. All processes related are CMOS compatible. Planar rectifier consists of four schottky diodes which were fabricated separately are compatible for monolithic integration on such foldable substrate. With such technology, it is possible to integrate LED drivers, micro channels for heat dissipation, or other silicon based technologies by CMOS processing, together with the flexible hinges, in order to have a G4 LED package with high lumen output and small form factor.
Journal of Micromechanics and Microengineering, 2015
ABSTRACT Miniaturization of solid state lighting (SSL) luminaires as well as reduction of packagi... more ABSTRACT Miniaturization of solid state lighting (SSL) luminaires as well as reduction of packaging and assembly costs are of prime interest for the SSL lighting industry. A novel silicon based LED package for lighting applications is presented in this paper. The proposed design consists of 5 rigid Si tiles connected by flexible polyimide hinges with embedded interconnects (ICs). Electrical, optical and thermal characteristics were taken into consideration during design. The fabrication process involved polyimide (PI) application and patterning, aluminium interconnect integration in the flexible hinge, LED reflector cavity formation and metalization followed by through wafer DRIE etching for chip formation and release. A method to connect chip front to backside without TSVs was also integrated into the process. Post-fabrication wafer level assembly included LED mounting and wirebond, phosphor-based colour conversion and silicone encapsulation. The package formation was finalized by vacuum assisted wrapping around an assembly structure to form a 3D geometry, which is beneficial for omnidirectional lighting. Bending tests were performed on the flexible ICs and optical performance at different temperatures was evaluated. It is suggested that 3D packages can be expanded to platforms for miniaturized luminaire applications by combining monolithic silicon integration and system-in-package (SiP) technologies.
Miniaturization of solid state lighting (SSL) luminaires as well as reduction of packaging and as... more Miniaturization of solid state lighting (SSL) luminaires as well as reduction of packaging and assembly costs are of prime interest for the SSL lighting industry. A novel silicon based LED package for lighting applications is presented in this paper. The proposed design consists of 5 rigid Si tiles connected by flexible polyimide hinges with embedded interconnects (ICs). Electrical, optical and thermal characteristics were taken into consideration during design. The fabrication process involved polyimide (PI) application and patterning, aluminium interconnect integration in the flexible hinge, LED reflector cavity formation and metalization followed by through wafer DRIE etching for chip formation and release. A method to connect chip front to backside without TSVs was also integrated into the process. Post-fabrication wafer level assembly included LED mounting and wirebond, phosphor-based colour conversion and silicone encapsulation. The package formation was finalized by vacuum as...
2014 44th European Solid State Device Research Conference (ESSDERC), 2014
Recently applying an intelligent self-curing system to get a feedback from the LED light in order... more Recently applying an intelligent self-curing system to get a feedback from the LED light in order to control its intensity with driving current has attracted so much attention. This study presents a silicon stripe-shaped photodiode which is successfully designed and fabricated using a 2μm BiCMOS process. This process flow integrates simultaneously the photodiodes, the CMOS and BJT transistors all in just five masks. In this cheap and smart wafer level LED packaging, fabricated photodiodes demonstrated a very high selectivity to blue light. The maximum responsivity is at 480nm which is matched with the blue LED's illumination. The single-stripe photodiodes due to their higher rate of recombination caused by the dead layer formation at the surface showed lower responsivity compared to multi-stripe ones. The fabricated devices presented a twofold increase in the responsivity and quantum efficiency compared to previously published sensors.
2008 IEEE 21st International Conference on Micro Electro Mechanical Systems, 2008
Advanced deep reactive ion etching (DRIE) with high etch rates (30 mum/min) is achieved by using ... more Advanced deep reactive ion etching (DRIE) with high etch rates (30 mum/min) is achieved by using an etching system with a novel ICP (inductively coupled plasma) source and substrate holder (chuck). Waferstepper dual side lithography (front- to backwater overlay < 500 nm) is used to fabricate electrical overlay test structures in order to measure the non-perpendicularity of the etch profile (angular deviation) and the post etch dimension in a through wafer etch process. Compared with a conventional configuration, the angular deviation is reduced from 0.6 deg to a very low value of 0.2 deg. Furthermore, the accuracy of through wafer etched features is improved from 0.7 % to 0.1 % (one sigma).
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Papers by H. Van Zeijl