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[WebAssembly] memcpy does not result in no-op for zero-length slices #16360

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Tracked by #22014
Luukdegram opened this issue Jul 8, 2023 · 2 comments
Open
Tracked by #22014
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arch-wasm 32-bit and 64-bit WebAssembly backend-llvm The LLVM backend outputs an LLVM IR Module. optimization upstream An issue with a third party project that Zig uses.
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@Luukdegram
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Zig Version

0.11.0-dev.3947+89396ff02

Steps to Reproduce and Observed Behavior

Given the following program and CLI input:

./stage2/bin/zig build-lib foo.zig -femit-bin=test.wasm -dynamic -mcpu=mvp+bulk_memory -target wasm32-freestanding --export=_start
const std = @import("std");
export fn _start() void {
    var ptr = foo();
    var dest = foo();
    @memcpy(dest, ptr);
}

fn foo() []u8 {
    const ptr = comptime std.mem.alignBackward(usize, std.math.maxInt(usize), 1);
    return @as([*]align(1) u8, @ptrFromInt(ptr))[0..0];
}

results in a program that traps:

> wasmtime test.wasm                                                                                                                                                                                                                                                                                                  07/08/2023 04:20:37 PM
Error: failed to run main module `test.wasm`

Caused by:
    0: failed to invoke command default
    1: error while executing at wasm backtrace:
           0:   0xd4 - _start
                           at /Users/luuk/dev/zig-dev/foo.zig:6:5
    2: wasm trap: out of bounds memory access

This is due to Wasm's memory.copy instruction trapping when the source -or destination address is out-of-bounds regardless of the length operand.

Expected Behavior

I expected zero-length memset/memcpy to result in a no-op and not trap.

@Luukdegram Luukdegram added the bug Observed behavior contradicts documented or intended behavior label Jul 8, 2023
@Luukdegram
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This is a tracking issue for upstream: llvm/llvm-project#63755, and can only be closed once the upstream bug has been fixed and landed downstream in Zig.

@Luukdegram Luukdegram added upstream An issue with a third party project that Zig uses. arch-wasm 32-bit and 64-bit WebAssembly backend-llvm The LLVM backend outputs an LLVM IR Module. labels Jul 8, 2023
@Luukdegram Luukdegram added this to the 0.12.0 milestone Jul 8, 2023
@alexrp
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alexrp commented Nov 30, 2024

As mentioned in #22108, this can be done with the LLVM 20 upgrade.

@alexrp alexrp added optimization and removed bug Observed behavior contradicts documented or intended behavior labels Nov 30, 2024
@alexrp alexrp modified the milestones: 0.14.0, 0.15.0 Nov 30, 2024
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Labels
arch-wasm 32-bit and 64-bit WebAssembly backend-llvm The LLVM backend outputs an LLVM IR Module. optimization upstream An issue with a third party project that Zig uses.
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