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Robby Cai
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MLK-23600-2 Update ISP and Dewarp clock and power
update ISP and Dewarp clock and power Signed-off-by: Robby Cai <[email protected]> Reviewed-by: Guoniu.zhou <[email protected]> (cherry picked from commit e6031680ba2d67a6961a5da5fc68a913962c66d2)
1 parent e20ebbc commit f5390f2

1 file changed

Lines changed: 24 additions & 4 deletions

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‎arch/arm64/boot/dts/freescale/imx8mp.dtsi‎

Lines changed: 24 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1810,8 +1810,10 @@
18101810
compatible = "fsl,imx8mp-isp";
18111811
reg = <0x32e10000 0x10000>;
18121812
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
1813-
clocks = <&clk IMX8MP_CLK_MEDIA_ISP_SRC>;
1814-
clock-names = "isp_root";
1813+
clocks = <&clk IMX8MP_CLK_MEDIA_ISP_SRC>,
1814+
<&clk IMX8MP_CLK_MEDIA_AXI>,
1815+
<&clk IMX8MP_CLK_MEDIA_APB>;
1816+
clock-names = "core", "axi", "ahb";
18151817
assigned-clocks = <&clk IMX8MP_CLK_MEDIA_ISP_SRC>;
18161818
assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>;
18171819
assigned-clock-rates = <500000000>;
@@ -1824,8 +1826,10 @@
18241826
compatible = "fsl,imx8mp-isp";
18251827
reg = <0x32e20000 0x10000>;
18261828
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
1827-
clocks = <&clk IMX8MP_CLK_MEDIA_ISP_SRC>;
1828-
clock-names = "isp_root";
1829+
clocks = <&clk IMX8MP_CLK_MEDIA_ISP_SRC>,
1830+
<&clk IMX8MP_CLK_MEDIA_AXI>,
1831+
<&clk IMX8MP_CLK_MEDIA_APB>;
1832+
clock-names = "core", "axi", "ahb";
18291833
assigned-clocks = <&clk IMX8MP_CLK_MEDIA_ISP_SRC>;
18301834
assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>;
18311835
assigned-clock-rates = <500000000>;
@@ -1838,6 +1842,14 @@
18381842
compatible = "fsl,imx8mp-dwe";
18391843
reg = <0x32e30000 0x10000>;
18401844
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
1845+
clocks = <&clk IMX8MP_CLK_MEDIA_AXI>,
1846+
<&clk IMX8MP_CLK_MEDIA_AXI>,
1847+
<&clk IMX8MP_CLK_MEDIA_APB>;
1848+
clock-names = "core", "axi", "ahb";
1849+
assigned-clocks = <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>,
1850+
<&clk IMX8MP_CLK_MEDIA_APB_ROOT>;
1851+
assigned-clock-rates = <500000000>, <200000000>;
1852+
power-domains = <&ispdwp_pd>;
18411853
id = <0>;
18421854
status = "disabled";
18431855
};
@@ -1846,6 +1858,14 @@
18461858
compatible = "fsl,imx8mp-dwe";
18471859
reg = <0x32e30000 0x10000>;
18481860
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
1861+
clocks = <&clk IMX8MP_CLK_MEDIA_AXI>,
1862+
<&clk IMX8MP_CLK_MEDIA_AXI>,
1863+
<&clk IMX8MP_CLK_MEDIA_APB>;
1864+
clock-names = "core", "axi", "ahb";
1865+
assigned-clocks = <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>,
1866+
<&clk IMX8MP_CLK_MEDIA_APB_ROOT>;
1867+
assigned-clock-rates = <500000000>, <200000000>;
1868+
power-domains = <&ispdwp_pd>;
18491869
id = <1>;
18501870
status = "disabled";
18511871
};

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