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bench: size the decimal kernel benchmarks by bytes rather than rows - #9980

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Sep 22, 2026
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connortsui20 merged 2 commits into
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ct/beautiful-maxwell-7eyyvp

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@connortsui20 connortsui20 commented Sep 22, 2026 •

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Summary

The decimal kernel benchmarks landed with a 1,024 row case. For i128 that runs in 0.4 to 1.2 µs
on the walltime legs, below what those machines resolve, so it reports mostly jitter: it moved by
10 to 19% on ten of the last thirteen CodSpeed reports, every one of them on a pull request that
touched no decimal code. No 8,192 row case and no i256 case has moved in those reports.

Changes

Derive each kernel case's row count from a working set of 256 KiB and 1 MiB of input plus output,
rather than fixing it at 1,024 and 8,192 rows:

Decimal width Small case Large case
i128 8,192 rows 32,768 rows
i256 4,096 rows 16,384 rows

Both widths now do comparable work, every case takes several microseconds instead of fractions of
one, and the largest still fits the 1 MiB L2 cache of the Graviton leg, so these stay measurements
of kernel code rather than of memory bandwidth.

The array benchmarks in the same files are #[cfg(not(codspeed))] and never run in CI, so they
keep their sizes for quick local runs. The benchmarking guide gains the measured walltime floor
next to the simulation floor documented in #9951.

Expect a one-time batch of CodSpeed rows for these eight cases when this merges, since the inputs
change size.

Checked with cargo clippy -p vortex-decimal-byte-parts --all-targets --all-features -- -D warnings
and cargo fmt. No benchmarks were run locally: this session is a shared cloud VM, so its walltime
numbers would not mean anything.

🤖 Generated with Claude Code

https://claude.ai/code/session_01B6ApyxEXpjiasZbQptsypn


Generated by Claude Code

@codspeed

codspeed Bot commented Sep 22, 2026 •

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Merging this PR will not alter performance

⚠️ Unknown Walltime execution environment detected

Using the Walltime instrument on standard Hosted Runners will lead to inconsistent data.

For the most accurate results, we recommend using CodSpeed Macro Runners: bare-metal machines fine-tuned for performance measurement consistency.

✅ 2172 untouched benchmarks
🆕 36 new benchmarks
⏩ 329 skipped benchmarks1

Performance Changes

Mode Benchmark BASE HEAD Efficiency
🆕 WallTime dbp_assemble_kernel_avx512[(I128, 32768)] N/A 17.5 µs N/A
🆕 WallTime dbp_assemble_kernel_avx512[(I256, 16384)] N/A 25.7 µs N/A
🆕 WallTime dbp_assemble_kernel_avx512[(I256, 4096)] N/A 6.3 µs N/A
🆕 WallTime dbp_assemble_kernel_narrow_msp_avx512[(I128, 32768)] N/A 20 µs N/A
🆕 WallTime dbp_assemble_kernel_narrow_msp_avx512[(I256, 16384)] N/A 28.5 µs N/A
🆕 WallTime dbp_assemble_kernel_narrow_msp_avx512[(I256, 4096)] N/A 7.1 µs N/A
🆕 WallTime dbp_split_kernel_all_valid_avx512[(I128, 32768)] N/A 31.3 µs N/A
🆕 WallTime dbp_split_kernel_all_valid_avx512[(I256, 16384)] N/A 27.3 µs N/A
🆕 WallTime dbp_split_kernel_all_valid_avx512[(I256, 4096)] N/A 6.9 µs N/A
🆕 WallTime dbp_split_kernel_mixed_null_avx512[(I128, 32768)] N/A 34.6 µs N/A
🆕 WallTime dbp_split_kernel_mixed_null_avx512[(I256, 16384)] N/A 30.9 µs N/A
🆕 WallTime dbp_split_kernel_mixed_null_avx512[(I256, 4096)] N/A 7.3 µs N/A
🆕 WallTime dbp_assemble_kernel_avx2[(I128, 32768)] N/A 17.6 µs N/A
🆕 WallTime dbp_assemble_kernel_avx2[(I256, 16384)] N/A 18 µs N/A
🆕 WallTime dbp_assemble_kernel_avx2[(I256, 4096)] N/A 4.1 µs N/A
🆕 WallTime dbp_assemble_kernel_narrow_msp_avx2[(I128, 32768)] N/A 20.6 µs N/A
🆕 WallTime dbp_assemble_kernel_narrow_msp_avx2[(I256, 16384)] N/A 19.1 µs N/A
🆕 WallTime dbp_assemble_kernel_narrow_msp_avx2[(I256, 4096)] N/A 4.5 µs N/A
🆕 WallTime dbp_split_kernel_all_valid_avx2[(I128, 32768)] N/A 31.5 µs N/A
🆕 WallTime dbp_split_kernel_all_valid_avx2[(I256, 16384)] N/A 33 µs N/A
... ... ... ... ... ...

ℹ️ Only the first 20 benchmarks are displayed. Go to the app to view all benchmarks.


Comparing ct/beautiful-maxwell-7eyyvp (c13ee65) with develop (133aacd)

Open in CodSpeed

Footnotes

  1. 329 benchmarks were skipped, so the baseline results were used instead. If they were deleted from the codebase, click here and archive them to remove them from the performance reports. ↩

Signed-off-by: Connor Tsui <[email protected]>
@connortsui20
connortsui20 force-pushed the ct/beautiful-maxwell-7eyyvp branch from c5811cc to 99dadb0 Compare September 22, 2026 19:46
@robert3005 robert3005 added the changelog/chore A trivial change label Sep 22, 2026
@connortsui20
connortsui20 enabled auto-merge (squash) September 22, 2026 20:50
@connortsui20
connortsui20 merged commit 36cb75d into develop Sep 22, 2026
96 of 97 checks passed
@connortsui20
connortsui20 deleted the ct/beautiful-maxwell-7eyyvp branch September 22, 2026 22:14
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