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frida-andersson
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frida-andersson
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Thanks for the fix! I added a couple of comments inline but otherwise LGTM
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| def _constrain_gfx942_tiles(num_rows: int) -> None: | ||
| """Pin the matmul tiles for the following calls on gfx942 (triton_kernels 3.8).""" | ||
| if on_gfx942(): |
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Can you use get_cdna_version() == 3 here instead of on_gfx942()?
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Updated to get_cdna_version() == 3 in 8eaa28c. The tuning remains limited to CDNA3.
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Verified on 8eaa28c: get_cdna_version() == 3 takes the tuned-tile path. MI325X (gfx942, get_cdna_version() == 3), ROCm 10.0 image vllm/vllm-openai-rocm:v0.33.0 (HIP 7.15, torch 2.13.0, triton 3.8.0), PR head files overlaid. pytest tests/kernels/moe/test_gpt_oss_triton_kernels.py: 29 passed, 2 skipped (CUDA-only SM11x/12x constraints), 0 failed.
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| @pytest.mark.parametrize("num_token", [2]) | ||
| @pytest.mark.parametrize("num_token", [2, 160]) |
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Minor: it looks like test_equiv only goes through triton_kernel_moe_forward, so the unfused class still only runs the decode tiles (test_modular_oai_triton_moe.py tops out at M=16). Can you add an M above 128 to MNK there too?
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Added (160, 512, 384) to MNK in 8eaa28c. With topk=4, this exercises 640 routed rows, above the 512-row tile switch, for both the fused and unfused expert classes. I haven't rerun the GPU tests yet.
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Verified on 8eaa28c with the new (160, 512, 384) case. MI325X (gfx942, get_cdna_version() == 3), ROCm 10.0 image vllm/vllm-openai-rocm:v0.33.0 (HIP 7.15, torch 2.13.0, triton 3.8.0), PR head files overlaid. pytest tests/kernels/moe/test_modular_oai_triton_moe.py: 25 passed, 0 failed/skipped; M=160 passes for both fused and unfused, with 32 and 128 experts. At topk=4 that is 640 rows > 512, and recording update_opt_flags_constraints shows the block_m=64 batch tiles for all four M=160 cases (the decode tiles for M<=16). test_gpt_oss_triton_kernels.py: 29 passed, 2 skipped.
AI assistance was used. Signed-off-by: Oliver Yu <[email protected]>
Use get_cdna_version() for the gfx942 tile selection and extend the modular MoE test to cover batches above the 512-row cutoff. AI assistance was used. Signed-off-by: Oliver Yu <[email protected]>
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Overview
gfx942 has no FP4 instructions, so the
triton_kernelsMXFP4 matmul upcasts inside the kernel and its default tiles are slow for gpt-oss. This pins the matmul tiles on gfx942 (triton_kernels3.8), the way the file already does for gfx950 and SM12x. Related: #42578 (open draft, a separate fused stage-1 kernel for gpt-oss-20b on MI300; it chose the same 16x64x256 decode tile). #50817 tunes the AITER MXFP4 path, not this one.Claims
Validation
All throughput numbers: dummy weights,
vllm bench serve --dataset-name random --ignore-eos --seed 7,--max-num-seqs 128, tok/s is input + output tokens. Two servers (default and patched) ran concurrently on two GPUs, then again with the GPUs swapped; ranges span both rounds.gpt-oss-20b, TP1:
TTFT is unchanged in the 8192/32 and 16000/16 rows; the gain is in the decode tokens.
gpt-oss-120b: TP1 batch 1 206 -> 544 tok/s (TPOT 14.3 -> 5.2 ms), c64 +44..46%; TP2 batch 1 261 -> 626 tok/s, c64 +36..39%; TP4 (the two arms ran one after the other, one round) batch 1 286 -> 612 tok/s, c16 +17%, c64 +23%, 8192/32 +18%.
Accuracy: gpt-oss-20b, real weights, GSM8K (1319 questions, chat endpoint, low reasoning effort, 8000-token cap), three runs per arm: unpatched 1243 / 1234 / 1238, patched 1237 / 1235 / 1238. Runs are not deterministic at concurrency 64 (the unpatched arm alone spans 9 questions), so there is no measurable difference.
Tests (MI325X, latest main + this change):
tests/kernels/moe/test_gpt_oss_triton_kernels.py: 29 passed, 2 skipped, 0 failed.tests/kernels/moe/test_modular_oai_triton_moe.py: 21 passed. (Run in one pytest process the second file fails on a GPU-memory-not-free check; main without this change fails the same way, so I ran the files separately.)test_equivnow also runs 160 tokens (640 rows, above the 512-row switch) so that the second tile set and the unfused class are exercised on gfx942 CI.Details
For
M * top_k <= 512(128 tokens at top-4) the pin isblock_m=16, block_n=64, block_k=256, num_warps=4; above thatblock_m=64, block_n=256, block_k=128, num_warps=8. The 512 switch was swept (128 and 256 were worse, 1024 and 2048 equal within noise).block_m=256, block_n=128, block_k=128with 8 warps, andblock_n=128, block_k=256, need more than the 64 KB LDS and fail to start. The constraint is applied in the two 3.8 branches (triton_kernel_fused_experts,UnfusedOAITritonExperts), so other archs, quantizations andtriton_kernelsversions are unaffected. Like the SM12x pin, it stays set for latertriton_kernelsmatmuls in the same thread.Limits: with AITER enabled this path is not used, and AITER is still faster at batch 1 (928 vs 820 tok/s on gpt-oss-20b). The matmuls remain 55% of decode time at about 40% of HBM bandwidth, so a kernel-level change in
triton_kernelscould do more. Only gpt-oss on MI325X (304 CUs) was measured; MI300X, MI308X, LoRA and expert parallel were not.AI assistance was used.
Pull Request Checklist
I used vLLM's
/pr-checklistskill. (Mandatory for agents, optional for humans).AI assistance was used during the creation of this PR.
Design Fit: Minimizes impact on core components, reuses existing functionality, and justifies added complexity.
Testing and Validation: Validates the change and ensures any added tests are meaningful and reliable, with CI coverage or documented CI resource constraints and validation performed outside CI.
Code Quality and Style: Keeps code and comments clear and concise, and updates relevant documentation and examples.
Pull Request Contents: Includes a brief summary and relevant links, supports claims with evidence, explains root causes and implementation trade-offs, and follows the contributing guide.