Xqa decode kernels#43232
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This pull request refactors the FlashInfer attention backend to support TRTLLM attention independently for prefill and decode phases, introducing granular capability checks and support for distinct query data types across phases. Feedback identifies critical issues in the Triton dequantization kernel regarding tl.arange constraints and memory hazards from per-layer buffer allocations. Additionally, reviewers noted a logic error in KV cache layout assertions that could cause crashes on SM100 and raised concerns about overriding user-specified flags when TRTLLM attention is explicitly disabled.
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FI + XQA is better in FP8 in both ttft and tpot FP8 fav3: native FlashInfer xqa: BF16 It seems vLLM FAv3 is better in BF16 in both ttft and tpot fav3: xqa: Qwen3-30B FP8 MMLU xqa fp8:
fav3 fp8:
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This pull request has merge conflicts that must be resolved before it can be |
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I also ran benchmarks on B200 to make sure we don't affect perf on the sm100 path git reset before my commits: |
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Hi @DanBlanaru, the pre-commit checks have failed. Please run: uv pip install pre-commit>=4.5.1
pre-commit install
pre-commit run --all-filesThen, commit the changes and push to your branch. For future commits, Tip Is
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pavanimajety
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First round of comments.
Restore NVFP4 and speculative-decode guards for the XQA path, and shorten the SM90 query dtype comments. Signed-off-by: Dan Blanaru <[email protected]>
Keep SM90 XQA advertised as single-token decode until vLLM wires the speculative decode mask path. Signed-off-by: Dan Blanaru <[email protected]>
Avoid applying q_scale when SM90 XQA decode uses model-dtype queries with FP8 KV cache. Signed-off-by: Dan Blanaru <[email protected]>
MatthewBonanni
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LGTM, thanks for iterating on this!
#43232 moved Q-dtype selection into a classmethod that re-derives its inputs from the global config, dropping two pieces of resolved builder state: the arch capability gate (FP8-Q crashed engine init on fa2-only archs like SM89/SM120) and the per-KV-group cache dtype (unquantized groups from --kv-cache-dtype-skip-layers wrongly got FP8-Q). Make it an instance method over self.cache_dtype and restore the capability gate (FI native fa3 on SM90, trtllm-gen/XQA on SM100). Co-authored-by: Claude Co-Authored-By: Claude Fable 5 <[email protected]> Claude-Session: https://claude.ai/code/session_012jb3BF13uN6cBp8TtGDQYe Signed-off-by: mgoin <[email protected]>
Sync 2026-07-03: picks up Model Runner V2 improvements (motivated by V2 viability reopening via PR#26). Notable: MRV2 scheduler req-slot bugfix (vllm-project#46974), MRV2 spec-decode int32 block-verify overflow fix (vllm-project#47383), MRV2 DSA-indexer prefill warmup for GLM-5.2/DSA (vllm-project#47285), V2-default for dense models (vllm-project#44443 — DSv4 is MoE so stays V1), DeepGEMM tag -> nv-dev a6b593d2 for SM120 (vllm-project#47304), TLI heterogeneous-vocab spec decode (vllm-project#38174), Delete PagedAttention (vllm-project#47361 — no impact, our sparse-MLA runner is a flashinfer symbol), Xqa decode kernels (vllm-project#43232). Conflict: vllm/v1/spec_decode/llm_base_proposer.py (our DSv4 MTP spec_step_idx routing vs upstream TLI) — resolved keeping BOTH: TLI's heterogeneous-vocab branch routed through our _compute_logits(spec_step_idx). Our SM12x stack preserved (persistent_topk, topk.cu, PR#26 padded-Q kernel, dspark, attention, R1 hardening all UNCHANGED); config/vllm.py DSv4->V1 default + DSpark env-control intact.
Signed-off-by: Dan Blanaru <[email protected]> Co-authored-by: Matthew Bonanni <[email protected]>
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Seems like this is break Nemotron + FlashInfer w/ FP8 kv cache, on Hopper |
Signed-off-by: Dan Blanaru <[email protected]> Co-authored-by: Matthew Bonanni <[email protected]>
Signed-off-by: Dan Blanaru <[email protected]> Co-authored-by: Matthew Bonanni <[email protected]> Signed-off-by: mayuyuace <[email protected]>
Signed-off-by: Dan Blanaru <[email protected]> Co-authored-by: Matthew Bonanni <[email protected]>
Signed-off-by: Dan Blanaru <[email protected]> Co-authored-by: Matthew Bonanni <[email protected]>
Signed-off-by: Dan Blanaru <[email protected]> Co-authored-by: Matthew Bonanni <[email protected]>
Purpose
Enable the FlashInfer TRTLLM/XQA decode path on Hopper (SM90) for vLLM V1 FlashInfer attention.
This makes TRTLLM attention support phase-aware, so decode can use FlashInfer's
trtllm_batch_decode_with_kv_cacheXQA path while prefill can remain on the existing FlashInfer native path when TRTLLM prefill is not supported. The branch also tracks prefill and decode query dtypes separately, since SM90 XQA decode requires BF16/FP16 query tensors with FP8 KV cacheTest Plan
You can run the xqa backend with:
and the fav3 with:
all of these tests pass on SM90: