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[wasm][liftoff] Fix register usage for i64_addi
The arm implementation made the assumption that the {lhs} and {dst} registers are either the same, or there is no overlap. This assumption does not hold. ia32 on the other hand has a lot of complicated logic (and unnecessary code generation) for different cases of overlap. This CL fixes the arm issue *and* simplifies the ia32 logic by making the arm assumption hold, and using it to eliminate special handling on ia32. [email protected] Bug: chromium:1146861 Change-Id: I8753c2ed70349e735c03293130c899c0c8a3a671 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2526388 Reviewed-by: Thibaud Michaud <[email protected]> Commit-Queue: Clemens Backes <[email protected]> Cr-Commit-Position: refs/heads/master@{#71060}
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Lines changed: 72 additions & 23 deletions

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‎src/wasm/baseline/arm/liftoff-assembler-arm.h‎

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@@ -139,6 +139,8 @@ template <void (Assembler::*op)(Register, Register, const Operand&, SBit,
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SBit, Condition)>
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inline void I64BinopI(LiftoffAssembler* assm, LiftoffRegister dst,
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LiftoffRegister lhs, int32_t imm) {
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// The compiler allocated registers such that either {dst == lhs} or there is
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// no overlap between the two.
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DCHECK_NE(dst.low_gp(), lhs.high_gp());
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(assm->*op)(dst.low_gp(), lhs.low_gp(), Operand(imm), SetCC, al);
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// Top half of the immediate sign extended, either 0 or -1.

‎src/wasm/baseline/ia32/liftoff-assembler-ia32.h‎

Lines changed: 9 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -1454,31 +1454,19 @@ template <void (Assembler::*op)(Register, const Immediate&),
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void (Assembler::*op_with_carry)(Register, int32_t)>
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inline void OpWithCarryI(LiftoffAssembler* assm, LiftoffRegister dst,
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LiftoffRegister lhs, int32_t imm) {
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// First, compute the low half of the result, potentially into a temporary dst
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// register if {dst.low_gp()} equals any register we need to
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// keep alive for computing the upper half.
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LiftoffRegList keep_alive = LiftoffRegList::ForRegs(lhs.high_gp());
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Register dst_low = keep_alive.has(dst.low_gp())
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? assm->GetUnusedRegister(kGpReg, keep_alive).gp()
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: dst.low_gp();
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if (dst_low != lhs.low_gp()) assm->mov(dst_low, lhs.low_gp());
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(assm->*op)(dst_low, Immediate(imm));
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// The compiler allocated registers such that either {dst == lhs} or there is
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// no overlap between the two.
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DCHECK_NE(dst.low_gp(), lhs.high_gp());
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// Now compute the upper half, while keeping alive the previous result.
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keep_alive = LiftoffRegList::ForRegs(dst_low);
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Register dst_high = keep_alive.has(dst.high_gp())
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? assm->GetUnusedRegister(kGpReg, keep_alive).gp()
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: dst.high_gp();
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// First, compute the low half of the result.
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if (dst.low_gp() != lhs.low_gp()) assm->mov(dst.low_gp(), lhs.low_gp());
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(assm->*op)(dst.low_gp(), Immediate(imm));
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if (dst_high != lhs.high_gp()) assm->mov(dst_high, lhs.high_gp());
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// Now compute the upper half.
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if (dst.high_gp() != lhs.high_gp()) assm->mov(dst.high_gp(), lhs.high_gp());
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// Top half of the immediate sign extended, either 0 or -1.
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int32_t sign_extend = imm < 0 ? -1 : 0;
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(assm->*op_with_carry)(dst_high, sign_extend);
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// If necessary, move result into the right registers.
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LiftoffRegister tmp_result = LiftoffRegister::ForPair(dst_low, dst_high);
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if (tmp_result != dst) assm->Move(dst, tmp_result, kWasmI64);
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(assm->*op_with_carry)(dst.high_gp(), sign_extend);
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}
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} // namespace liftoff
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‎src/wasm/baseline/liftoff-compiler.cc‎

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1244,9 +1244,12 @@ class LiftoffCompiler {
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int32_t imm = rhs_slot.i32_const();
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LiftoffRegister lhs = __ PopToRegister();
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// Either reuse {lhs} for {dst}, or choose a register (pair) which does
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// not overlap, for easier code generation.
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LiftoffRegList pinned = LiftoffRegList::ForRegs(lhs);
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LiftoffRegister dst = src_rc == result_rc
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? __ GetUnusedRegister(result_rc, {lhs}, {})
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: __ GetUnusedRegister(result_rc, {});
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? __ GetUnusedRegister(result_rc, {lhs}, pinned)
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: __ GetUnusedRegister(result_rc, pinned);
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CallEmitFn(fnImm, dst, lhs, imm);
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__ PushRegister(ValueType::Primitive(result_type), dst);

‎test/mjsunit/regress/wasm/regress-1146861.js‎

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,56 @@
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// Copyright 2020 the V8 project authors. All rights reserved.
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// Use of this source code is governed by a BSD-style license that can be
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// found in the LICENSE file.
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load('test/mjsunit/wasm/wasm-module-builder.js');
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const builder = new WasmModuleBuilder();
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builder.addGlobal(kWasmI32, 1);
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builder.addType(makeSig([], [kWasmF64]));
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// Generate function 1 (out of 1).
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builder.addFunction(undefined, 0 /* sig */)
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.addLocals(kWasmI32, 8).addLocals(kWasmI64, 3)
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.addBodyWithEnd([
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// signature: d_v
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// body:
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kExprGlobalGet, 0x00, // global.get
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kExprLocalSet, 0x00, // local.set
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kExprI32Const, 0x00, // i32.const
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kExprI32Eqz, // i32.eqz
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kExprLocalSet, 0x01, // local.set
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kExprGlobalGet, 0x00, // global.get
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kExprLocalSet, 0x02, // local.set
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kExprI32Const, 0x01, // i32.const
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kExprI32Const, 0x01, // i32.const
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kExprI32Sub, // i32.sub
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kExprLocalSet, 0x03, // local.set
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kExprGlobalGet, 0x00, // global.get
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kExprLocalSet, 0x04, // local.set
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kExprI32Const, 0x00, // i32.const
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kExprI32Eqz, // i32.eqz
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kExprLocalSet, 0x05, // local.set
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kExprGlobalGet, 0x00, // global.get
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kExprLocalSet, 0x06, // local.set
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kExprI32Const, 0x00, // i32.const
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kExprI32Const, 0x01, // i32.const
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kExprI32Sub, // i32.sub
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kExprLocalSet, 0x07, // local.set
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kExprBlock, kWasmStmt, // block @45
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kExprI32Const, 0x00, // i32.const
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kExprIf, kWasmStmt, // if @49
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kExprLocalGet, 0x0a, // local.get
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kExprLocalSet, 0x08, // local.set
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kExprElse, // else @55
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kExprNop, // nop
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kExprEnd, // end @57
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kExprLocalGet, 0x08, // local.get
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kExprLocalSet, 0x09, // local.set
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kExprLocalGet, 0x09, // local.get
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kExprI64Const, 0xff, 0x01, // i64.const
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kExprI64Add, // i64.add
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kExprDrop, // drop
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kExprEnd, // end @69
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kExprF64Const, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x3f, // f64.const
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kExprEnd, // end @79
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]);
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builder.instantiate();

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