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[turbofan] Fix operands for VisitDiv on Intel.
The idiv instruction has 2 registers as output. This needs to be modeled so that the move optimizer won't incorrectly elide away moves. BUG= Review URL: https://codereview.chromium.org/1818323002 Cr-Commit-Position: refs/heads/master@{#34978}
1 parent e1bd9af commit 1da4b88

2 files changed

Lines changed: 6 additions & 4 deletions

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src/compiler/ia32/instruction-selector-ia32.cc

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -535,9 +535,10 @@ void VisitDiv(InstructionSelector* selector, Node* node, ArchOpcode opcode) {
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void VisitMod(InstructionSelector* selector, Node* node, ArchOpcode opcode) {
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IA32OperandGenerator g(selector);
538+
InstructionOperand temps[] = {g.TempRegister(eax)};
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selector->Emit(opcode, g.DefineAsFixed(node, edx),
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g.UseFixed(node->InputAt(0), eax),
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g.UseUnique(node->InputAt(1)));
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g.UseUnique(node->InputAt(1)), arraysize(temps), temps);
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}
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void EmitLea(InstructionSelector* selector, Node* result, Node* index,

src/compiler/x64/instruction-selector-x64.cc

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -793,9 +793,10 @@ void VisitDiv(InstructionSelector* selector, Node* node, ArchOpcode opcode) {
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void VisitMod(InstructionSelector* selector, Node* node, ArchOpcode opcode) {
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X64OperandGenerator g(selector);
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selector->Emit(opcode, g.DefineAsFixed(node, rdx),
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g.UseFixed(node->InputAt(0), rax),
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g.UseUniqueRegister(node->InputAt(1)));
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InstructionOperand temps[] = {g.TempRegister(rax)};
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selector->Emit(
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opcode, g.DefineAsFixed(node, rdx), g.UseFixed(node->InputAt(0), rax),
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g.UseUniqueRegister(node->InputAt(1)), arraysize(temps), temps);
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}
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} // namespace

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