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lenbIngo Molnar
lenb
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Ingo Molnar
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x86/tsc: Enumerate SKL cpu_khz and tsc_khz via CPUID
Skylake CPU base-frequency and TSC frequency may differ by up to 2%. Enumerate CPU and TSC frequencies separately, allowing cpu_khz and tsc_khz to differ. The existing CPU frequency calibration mechanism is unchanged. However, CPUID extensions are preferred, when available. CPUID.0x16 is preferred over MSR and timer calibration for CPU frequency discovery. CPUID.0x15 takes precedence over CPU-frequency for TSC frequency discovery. Signed-off-by: Len Brown <[email protected]> Reviewed-by: Thomas Gleixner <[email protected]> Cc: Linus Torvalds <[email protected]> Cc: Peter Zijlstra <[email protected]> Link: http://lkml.kernel.org/r/b27ec289fd005833b27d694d9c2dbb716c5cdff7.1466138954.git.len.brown@intel.com Signed-off-by: Ingo Molnar <[email protected]>
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+73
-8
lines changed

4 files changed

+73
-8
lines changed

‎arch/x86/include/asm/tsc.h

+1
Original file line numberDiff line numberDiff line change
@@ -36,6 +36,7 @@ extern void mark_tsc_unstable(char *reason);
3636
extern int unsynchronized_tsc(void);
3737
extern int check_tsc_unstable(void);
3838
extern int check_tsc_disabled(void);
39+
extern unsigned long native_calibrate_cpu(void);
3940
extern unsigned long native_calibrate_tsc(void);
4041
extern unsigned long long native_sched_clock_from_tsc(u64 tsc);
4142

‎arch/x86/include/asm/x86_init.h

+3-1
Original file line numberDiff line numberDiff line change
@@ -181,7 +181,8 @@ struct x86_legacy_features {
181181

182182
/**
183183
* struct x86_platform_ops - platform specific runtime functions
184-
* @calibrate_tsc: calibrate TSC
184+
* @calibrate_cpu: calibrate CPU
185+
* @calibrate_tsc: calibrate TSC, if different from CPU
185186
* @get_wallclock: get time from HW clock like RTC etc.
186187
* @set_wallclock: set time back to HW clock
187188
* @is_untracked_pat_range exclude from PAT logic
@@ -200,6 +201,7 @@ struct x86_legacy_features {
200201
* semantics.
201202
*/
202203
struct x86_platform_ops {
204+
unsigned long (*calibrate_cpu)(void);
203205
unsigned long (*calibrate_tsc)(void);
204206
void (*get_wallclock)(struct timespec *ts);
205207
int (*set_wallclock)(const struct timespec *ts);

‎arch/x86/kernel/tsc.c

+68-7
Original file line numberDiff line numberDiff line change
@@ -239,7 +239,7 @@ static inline unsigned long long cycles_2_ns(unsigned long long cyc)
239239
return ns;
240240
}
241241

242-
static void set_cyc2ns_scale(unsigned long cpu_khz, int cpu)
242+
static void set_cyc2ns_scale(unsigned long khz, int cpu)
243243
{
244244
unsigned long long tsc_now, ns_now;
245245
struct cyc2ns_data *data;
@@ -248,7 +248,7 @@ static void set_cyc2ns_scale(unsigned long cpu_khz, int cpu)
248248
local_irq_save(flags);
249249
sched_clock_idle_sleep_event();
250250

251-
if (!cpu_khz)
251+
if (!khz)
252252
goto done;
253253

254254
data = cyc2ns_write_begin(cpu);
@@ -261,7 +261,7 @@ static void set_cyc2ns_scale(unsigned long cpu_khz, int cpu)
261261
* time function is continuous; see the comment near struct
262262
* cyc2ns_data.
263263
*/
264-
clocks_calc_mult_shift(&data->cyc2ns_mul, &data->cyc2ns_shift, cpu_khz,
264+
clocks_calc_mult_shift(&data->cyc2ns_mul, &data->cyc2ns_shift, khz,
265265
NSEC_PER_MSEC, 0);
266266

267267
/*
@@ -665,15 +665,72 @@ static unsigned long quick_pit_calibrate(void)
665665
}
666666

667667
/**
668-
* native_calibrate_tsc - calibrate the tsc on boot
668+
* native_calibrate_tsc
669+
* Determine TSC frequency via CPUID, else return 0.
669670
*/
670671
unsigned long native_calibrate_tsc(void)
672+
{
673+
unsigned int eax_denominator, ebx_numerator, ecx_hz, edx;
674+
unsigned int crystal_khz;
675+
676+
if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
677+
return 0;
678+
679+
if (boot_cpu_data.cpuid_level < 0x15)
680+
return 0;
681+
682+
eax_denominator = ebx_numerator = ecx_hz = edx = 0;
683+
684+
/* CPUID 15H TSC/Crystal ratio, plus optionally Crystal Hz */
685+
cpuid(0x15, &eax_denominator, &ebx_numerator, &ecx_hz, &edx);
686+
687+
if (ebx_numerator == 0 || eax_denominator == 0)
688+
return 0;
689+
690+
crystal_khz = ecx_hz / 1000;
691+
692+
if (crystal_khz == 0) {
693+
switch (boot_cpu_data.x86_model) {
694+
case 0x4E: /* SKL */
695+
case 0x5E: /* SKL */
696+
crystal_khz = 24000; /* 24 MHz */
697+
}
698+
}
699+
700+
return crystal_khz * ebx_numerator / eax_denominator;
701+
}
702+
703+
static unsigned long cpu_khz_from_cpuid(void)
704+
{
705+
unsigned int eax_base_mhz, ebx_max_mhz, ecx_bus_mhz, edx;
706+
707+
if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
708+
return 0;
709+
710+
if (boot_cpu_data.cpuid_level < 0x16)
711+
return 0;
712+
713+
eax_base_mhz = ebx_max_mhz = ecx_bus_mhz = edx = 0;
714+
715+
cpuid(0x16, &eax_base_mhz, &ebx_max_mhz, &ecx_bus_mhz, &edx);
716+
717+
return eax_base_mhz * 1000;
718+
}
719+
720+
/**
721+
* native_calibrate_cpu - calibrate the cpu on boot
722+
*/
723+
unsigned long native_calibrate_cpu(void)
671724
{
672725
u64 tsc1, tsc2, delta, ref1, ref2;
673726
unsigned long tsc_pit_min = ULONG_MAX, tsc_ref_min = ULONG_MAX;
674727
unsigned long flags, latch, ms, fast_calibrate;
675728
int hpet = is_hpet_enabled(), i, loopmin;
676729

730+
fast_calibrate = cpu_khz_from_cpuid();
731+
if (fast_calibrate)
732+
return fast_calibrate;
733+
677734
fast_calibrate = cpu_khz_from_msr();
678735
if (fast_calibrate)
679736
return fast_calibrate;
@@ -834,8 +891,10 @@ int recalibrate_cpu_khz(void)
834891
if (!boot_cpu_has(X86_FEATURE_TSC))
835892
return -ENODEV;
836893

894+
cpu_khz = x86_platform.calibrate_cpu();
837895
tsc_khz = x86_platform.calibrate_tsc();
838-
cpu_khz = tsc_khz;
896+
if (tsc_khz == 0)
897+
tsc_khz = cpu_khz;
839898
cpu_data(0).loops_per_jiffy = cpufreq_scale(cpu_data(0).loops_per_jiffy,
840899
cpu_khz_old, cpu_khz);
841900

@@ -1241,8 +1300,10 @@ void __init tsc_init(void)
12411300
return;
12421301
}
12431302

1303+
cpu_khz = x86_platform.calibrate_cpu();
12441304
tsc_khz = x86_platform.calibrate_tsc();
1245-
cpu_khz = tsc_khz;
1305+
if (tsc_khz == 0)
1306+
tsc_khz = cpu_khz;
12461307

12471308
if (!tsc_khz) {
12481309
mark_tsc_unstable("could not calculate TSC khz");
@@ -1262,7 +1323,7 @@ void __init tsc_init(void)
12621323
*/
12631324
for_each_possible_cpu(cpu) {
12641325
cyc2ns_init(cpu);
1265-
set_cyc2ns_scale(cpu_khz, cpu);
1326+
set_cyc2ns_scale(tsc_khz, cpu);
12661327
}
12671328

12681329
if (tsc_disabled > 0)

‎arch/x86/kernel/x86_init.c

+1
Original file line numberDiff line numberDiff line change
@@ -92,6 +92,7 @@ static void default_nmi_init(void) { };
9292
static int default_i8042_detect(void) { return 1; };
9393

9494
struct x86_platform_ops x86_platform = {
95+
.calibrate_cpu = native_calibrate_cpu,
9596
.calibrate_tsc = native_calibrate_tsc,
9697
.get_wallclock = mach_get_cmos_time,
9798
.set_wallclock = mach_set_rtc_mmss,

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