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Merged
copybara-service merged 2 commits into from
May 27, 2021
Merged

[Pluggable Device] Adding more DEVICE_DEFAULT kernels. #49111

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c1d8a2e
[Pluggable Device] Adding more DEVICE_DEFAULT kernels.
kulinseth Mar 21, 2021
a60f9d7
Addressing the comments.
kulinseth May 26, 2021
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7 changes: 7 additions & 0 deletions tensorflow/core/kernels/aggregate_ops.cc
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Expand Up @@ -283,4 +283,11 @@ REGISTER_KERNEL_BUILDER(Name("AddN")

#undef REGISTER_ADDN

REGISTER_KERNEL_BUILDER(Name("AddN")
.Device(DEVICE_DEFAULT)
.TypeConstraint<int32>("T")
.HostMemory("inputs")
.HostMemory("sum"),
AddNOp<CPUDevice, int32>);

} // namespace tensorflow
7 changes: 7 additions & 0 deletions tensorflow/core/kernels/broadcast_to_op.cc
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Expand Up @@ -141,5 +141,12 @@ REGISTER_KERNEL_BUILDER(Name("BroadcastTo")
.HostMemory("output"),
BroadcastToOp<CPUDevice, int32>);
#endif
REGISTER_KERNEL_BUILDER(Name("BroadcastTo")
.Device(DEVICE_DEFAULT)
.TypeConstraint<int32>("T")
.HostMemory("input")
.HostMemory("shape")
.HostMemory("output"),
BroadcastToOp<CPUDevice, int32>);

} // namespace tensorflow
22 changes: 22 additions & 0 deletions tensorflow/core/kernels/concat_op.cc
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Expand Up @@ -241,6 +241,21 @@ REGISTER_KERNEL_BUILDER(Name("ConcatV2")

#endif // GOOGLE_CUDA || TENSORFLOW_USE_ROCM

REGISTER_KERNEL_BUILDER(Name("Concat")
.Device(DEVICE_DEFAULT)
.TypeConstraint<int32>("T")
.HostMemory("concat_dim")
.HostMemory("values")
.HostMemory("output"),
ConcatOp<CPUDevice, int32>);
REGISTER_KERNEL_BUILDER(Name("ConcatV2")
.Device(DEVICE_DEFAULT)
.TypeConstraint<int32>("T")
.HostMemory("values")
.HostMemory("axis")
.HostMemory("output"),
ConcatV2Op<CPUDevice, int32>);


class ConcatOffsetOp : public OpKernel {
public:
Expand Down Expand Up @@ -328,4 +343,11 @@ REGISTER_KERNEL_BUILDER(Name("ConcatOffset")
.HostMemory("offset"),
ConcatOffsetOp);

REGISTER_KERNEL_BUILDER(Name("ConcatOffset")
.Device(DEVICE_DEFAULT)
.HostMemory("concat_dim")
.HostMemory("shape")
.HostMemory("offset"),
ConcatOffsetOp);

} // namespace tensorflow
22 changes: 22 additions & 0 deletions tensorflow/core/kernels/constant_op.cc
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Expand Up @@ -231,6 +231,15 @@ REGISTER_KERNEL_BUILDER(Name("Fill")

#undef REGISTER_KERNEL

REGISTER_KERNEL_BUILDER(Name("Fill")
.Device(DEVICE_DEFAULT)
.TypeConstraint<int32>("T")
.TypeConstraint<int32>("index_type")
.HostMemory("dims")
.HostMemory("value")
.HostMemory("output"),
FillOp<CPUDevice, int32, int32>);

template <typename Device, typename T>
class ZerosLikeOp : public OpKernel {
public:
Expand Down Expand Up @@ -293,6 +302,12 @@ REGISTER_KERNEL_BUILDER(Name("ZerosLike")

#undef REGISTER_KERNEL

REGISTER_KERNEL_BUILDER(Name("ZerosLike")
.Device(DEVICE_DEFAULT)
.TypeConstraint<int32>("T")
.HostMemory("y"),
ZerosLikeOp<CPUDevice, int32>);

template <typename Device, typename T>
class OnesLikeOp : public OpKernel {
public:
Expand Down Expand Up @@ -336,6 +351,12 @@ REGISTER_KERNEL_BUILDER(Name("OnesLike")

#undef REGISTER_KERNEL

REGISTER_KERNEL_BUILDER(Name("OnesLike")
.Device(DEVICE_DEFAULT)
.TypeConstraint<int32>("T")
.HostMemory("y"),
OnesLikeOp<CPUDevice, int32>);

PlaceholderOp::PlaceholderOp(OpKernelConstruction* ctx) : OpKernel(ctx) {
OP_REQUIRES_OK(ctx, ctx->GetAttr("shape", &expected_shape_));
}
Expand All @@ -358,6 +379,7 @@ void PlaceholderOp::Compute(OpKernelContext* ctx) {
REGISTER_KERNEL_BUILDER(Name("Placeholder").Device(DEVICE_CPU), PlaceholderOp);
REGISTER_KERNEL_BUILDER(Name("PlaceholderV2").Device(DEVICE_CPU),
PlaceholderOp);

// The following GPU/Default kernel registration is used to address the
// situation that a placeholder is added in a GPU device context and soft
// placement is false. Since a placeholder should never be executed, adding
Expand Down
6 changes: 6 additions & 0 deletions tensorflow/core/kernels/cwise_op_abs.cc
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Expand Up @@ -43,5 +43,11 @@ REGISTER_KERNEL_BUILDER(Name("Abs")
.TypeConstraint<int32>("T"),
UnaryOp<CPUDevice, functor::abs<int32>>);
#endif
REGISTER_KERNEL_BUILDER(Name("Abs")
.Device(DEVICE_DEFAULT)
.HostMemory("x")
.HostMemory("y")
.TypeConstraint<int32>("T"),
UnaryOp<CPUDevice, functor::abs<int32>>);

} // namespace tensorflow
14 changes: 14 additions & 0 deletions tensorflow/core/kernels/cwise_op_add_1.cc
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Expand Up @@ -52,5 +52,19 @@ REGISTER_KERNEL_BUILDER(Name("AddV2")
.TypeConstraint<int32>("T"),
BinaryOp<CPUDevice, functor::add<int32>>);
#endif
REGISTER_KERNEL_BUILDER(Name("Add")
.Device(DEVICE_DEFAULT)
.HostMemory("x")
.HostMemory("y")
.HostMemory("z")
.TypeConstraint<int32>("T"),
BinaryOp<CPUDevice, functor::add<int32>>);
REGISTER_KERNEL_BUILDER(Name("AddV2")
.Device(DEVICE_DEFAULT)
.HostMemory("x")
.HostMemory("y")
.HostMemory("z")
.TypeConstraint<int32>("T"),
BinaryOp<CPUDevice, functor::add<int32>>);

} // namespace tensorflow
8 changes: 8 additions & 0 deletions tensorflow/core/kernels/cwise_op_div.cc
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Expand Up @@ -27,6 +27,14 @@ REGISTER6(BinaryOp, CPU, "RealDiv", functor::div, float, Eigen::half, double,
REGISTER5(BinaryOp, CPU, "DivNoNan", functor::div_no_nan, Eigen::half, float,
double, complex64, complex128);

REGISTER_KERNEL_BUILDER(Name("Div")
.Device(DEVICE_DEFAULT)
.HostMemory("x")
.HostMemory("y")
.HostMemory("z")
.TypeConstraint<int32>("T"),
BinaryOp<CPUDevice, functor::safe_div<int32>>);

#if GOOGLE_CUDA || TENSORFLOW_USE_ROCM
// ROCM TODO: re-enable complex64 / complex128 after compiler fix
#if !defined(MLIR_GENERATED_GPU_KERNELS_ENABLED)
Expand Down
9 changes: 9 additions & 0 deletions tensorflow/core/kernels/cwise_op_equal_to_1.cc
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Expand Up @@ -26,6 +26,15 @@ REGISTER_KERNEL_BUILDER(
REGISTER_KERNEL_BUILDER(
Name("ApproximateEqual").Device(DEVICE_CPU).TypeConstraint<double>("T"),
ApproximateEqualOp<CPUDevice, double>);

REGISTER_KERNEL_BUILDER(Name("Equal")
.Device(DEVICE_DEFAULT)
.HostMemory("x")
.HostMemory("y")
.HostMemory("z")
.TypeConstraint<int32>("T"),
BinaryOp<CPUDevice, functor::equal_to<int32>>);

#if GOOGLE_CUDA || TENSORFLOW_USE_ROCM
#if !defined(MLIR_GENERATED_GPU_KERNELS_ENABLED)
REGISTER4(BinaryOp, GPU, "Equal", functor::equal_to, float, Eigen::half, double,
Expand Down
7 changes: 7 additions & 0 deletions tensorflow/core/kernels/cwise_op_floor_div.cc
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Expand Up @@ -42,5 +42,12 @@ REGISTER_KERNEL_BUILDER(Name("FloorDiv")
.TypeConstraint<int32>("T"),
BinaryOp<CPUDevice, functor::safe_floor_div<int32>>);
#endif
REGISTER_KERNEL_BUILDER(Name("FloorDiv")
.Device(DEVICE_DEFAULT)
.HostMemory("x")
.HostMemory("y")
.HostMemory("z")
.TypeConstraint<int32>("T"),
BinaryOp<CPUDevice, functor::safe_floor_div<int32>>);

} // namespace tensorflow
8 changes: 8 additions & 0 deletions tensorflow/core/kernels/cwise_op_floor_mod.cc
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Expand Up @@ -34,4 +34,12 @@ REGISTER_KERNEL_BUILDER(Name("FloorMod")
BinaryOp<CPUDevice, functor::safe_floor_mod<int32>>);
#endif

REGISTER_KERNEL_BUILDER(Name("FloorMod")
.Device(DEVICE_DEFAULT)
.HostMemory("x")
.HostMemory("y")
.HostMemory("z")
.TypeConstraint<int32>("T"),
BinaryOp<CPUDevice, functor::safe_floor_mod<int32>>);

} // namespace tensorflow
7 changes: 7 additions & 0 deletions tensorflow/core/kernels/cwise_op_greater.cc
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Expand Up @@ -42,4 +42,11 @@ REGISTER_KERNEL_BUILDER(Name("Greater")
.TypeConstraint<int32>("T"),
BinaryOp<CPUDevice, functor::greater<int32>>);
#endif
REGISTER_KERNEL_BUILDER(Name("Greater")
.Device(DEVICE_DEFAULT)
.HostMemory("x")
.HostMemory("y")
.HostMemory("z")
.TypeConstraint<int32>("T"),
BinaryOp<CPUDevice, functor::greater<int32>>);
} // namespace tensorflow
8 changes: 8 additions & 0 deletions tensorflow/core/kernels/cwise_op_greater_equal.cc
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Expand Up @@ -43,4 +43,12 @@ REGISTER_KERNEL_BUILDER(Name("GreaterEqual")
BinaryOp<CPUDevice, functor::greater_equal<int32>>);
#endif

REGISTER_KERNEL_BUILDER(Name("GreaterEqual")
.Device(DEVICE_DEFAULT)
.HostMemory("x")
.HostMemory("y")
.HostMemory("z")
.TypeConstraint<int32>("T"),
BinaryOp<CPUDevice, functor::greater_equal<int32>>);

} // namespace tensorflow
7 changes: 7 additions & 0 deletions tensorflow/core/kernels/cwise_op_less.cc
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Expand Up @@ -42,4 +42,11 @@ REGISTER_KERNEL_BUILDER(Name("Less")
.TypeConstraint<int32>("T"),
BinaryOp<CPUDevice, functor::less<int32>>);
#endif
REGISTER_KERNEL_BUILDER(Name("Less")
.Device(DEVICE_DEFAULT)
.HostMemory("x")
.HostMemory("y")
.HostMemory("z")
.TypeConstraint<int32>("T"),
BinaryOp<CPUDevice, functor::less<int32>>);
} // namespace tensorflow
7 changes: 7 additions & 0 deletions tensorflow/core/kernels/cwise_op_less_equal.cc
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Expand Up @@ -43,5 +43,12 @@ REGISTER_KERNEL_BUILDER(Name("LessEqual")
.TypeConstraint<int32>("T"),
BinaryOp<CPUDevice, functor::less_equal<int32>>);
#endif
REGISTER_KERNEL_BUILDER(Name("LessEqual")
.Device(DEVICE_DEFAULT)
.HostMemory("x")
.HostMemory("y")
.HostMemory("z")
.TypeConstraint<int32>("T"),
BinaryOp<CPUDevice, functor::less_equal<int32>>);

} // namespace tensorflow
7 changes: 7 additions & 0 deletions tensorflow/core/kernels/cwise_op_maximum.cc
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Expand Up @@ -38,5 +38,12 @@ REGISTER_KERNEL_BUILDER(Name("Maximum")
.TypeConstraint<int32>("T"),
BinaryOp<CPUDevice, functor::maximum<int32>>);
#endif
REGISTER_KERNEL_BUILDER(Name("Maximum")
.Device(DEVICE_DEFAULT)
.HostMemory("x")
.HostMemory("y")
.HostMemory("z")
.TypeConstraint<int32>("T"),
BinaryOp<CPUDevice, functor::maximum<int32>>);

} // namespace tensorflow
8 changes: 8 additions & 0 deletions tensorflow/core/kernels/cwise_op_minimum.cc
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Expand Up @@ -39,5 +39,13 @@ REGISTER_KERNEL_BUILDER(Name("Minimum")
BinaryOp<CPUDevice, functor::minimum<int32>>);
#endif

REGISTER_KERNEL_BUILDER(Name("Minimum")
.Device(DEVICE_DEFAULT)
.HostMemory("x")
.HostMemory("y")
.HostMemory("z")
.TypeConstraint<int32>("T"),
BinaryOp<CPUDevice, functor::minimum<int32>>);


} // namespace tensorflow
14 changes: 14 additions & 0 deletions tensorflow/core/kernels/cwise_op_mod.cc
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Expand Up @@ -40,4 +40,18 @@ REGISTER_KERNEL_BUILDER(Name("TruncateMod")
.TypeConstraint<int32>("T"),
BinaryOp<CPUDevice, functor::safe_mod<int32>>);
#endif
REGISTER_KERNEL_BUILDER(Name("Mod")
.Device(DEVICE_DEFAULT)
.HostMemory("x")
.HostMemory("y")
.HostMemory("z")
.TypeConstraint<int32>("T"),
BinaryOp<CPUDevice, functor::safe_mod<int32>>);
REGISTER_KERNEL_BUILDER(Name("TruncateMod")
.Device(DEVICE_DEFAULT)
.HostMemory("x")
.HostMemory("y")
.HostMemory("z")
.TypeConstraint<int32>("T"),
BinaryOp<CPUDevice, functor::safe_mod<int32>>);
} // namespace tensorflow
7 changes: 7 additions & 0 deletions tensorflow/core/kernels/cwise_op_mul_1.cc
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Expand Up @@ -47,6 +47,13 @@ REGISTER_KERNEL_BUILDER(Name("Mul")
.TypeConstraint<int32>("T"),
BinaryOp<CPUDevice, functor::mul<int32>>);
#endif
REGISTER_KERNEL_BUILDER(Name("Mul")
.Device(DEVICE_DEFAULT)
.HostMemory("x")
.HostMemory("y")
.HostMemory("z")
.TypeConstraint<int32>("T"),
BinaryOp<CPUDevice, functor::mul<int32>>);

#if GOOGLE_CUDA || TENSORFLOW_USE_ROCM
REGISTER5(BinaryOp, GPU, "MulNoNan", functor::mul_no_nan, Eigen::half, float,
Expand Down
6 changes: 6 additions & 0 deletions tensorflow/core/kernels/cwise_op_neg_1.cc
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Expand Up @@ -34,4 +34,10 @@ REGISTER_KERNEL_BUILDER(Name("Neg")
.TypeConstraint<int32>("T"),
UnaryOp<CPUDevice, functor::neg<int32>>);
#endif
REGISTER_KERNEL_BUILDER(Name("Neg")
.Device(DEVICE_DEFAULT)
.HostMemory("x")
.HostMemory("y")
.TypeConstraint<int32>("T"),
UnaryOp<CPUDevice, functor::neg<int32>>);
} // namespace tensorflow
9 changes: 9 additions & 0 deletions tensorflow/core/kernels/cwise_op_not_equal_to_1.cc
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Expand Up @@ -20,6 +20,15 @@ REGISTER7(BinaryOp, CPU, "NotEqual", functor::not_equal_to, float, Eigen::half,
double, uint8, int8, int16, bfloat16);
REGISTER7(BinaryOp, CPU, "NotEqual", functor::not_equal_to, uint16, uint32,
uint64, qint8, qint16, quint8, quint16);

REGISTER_KERNEL_BUILDER(Name("NotEqual")
.Device(DEVICE_DEFAULT)
.HostMemory("x")
.HostMemory("y")
.HostMemory("z")
.TypeConstraint<int32>("T"),
BinaryOp<CPUDevice, functor::not_equal_to<int32>>);

#if GOOGLE_CUDA || TENSORFLOW_USE_ROCM
#if !defined(MLIR_GENERATED_GPU_KERNELS_ENABLED)
REGISTER4(BinaryOp, GPU, "NotEqual", functor::not_equal_to, float, Eigen::half,
Expand Down
6 changes: 6 additions & 0 deletions tensorflow/core/kernels/cwise_op_sign.cc
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Expand Up @@ -36,5 +36,11 @@ REGISTER_KERNEL_BUILDER(Name("Sign")
.TypeConstraint<int32>("T"),
UnaryOp<CPUDevice, functor::sign<int32>>);
#endif
REGISTER_KERNEL_BUILDER(Name("Sign")
.Device(DEVICE_DEFAULT)
.HostMemory("x")
.HostMemory("y")
.TypeConstraint<int32>("T"),
UnaryOp<CPUDevice, functor::sign<int32>>);

} // namespace tensorflow
6 changes: 6 additions & 0 deletions tensorflow/core/kernels/cwise_op_square.cc
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Expand Up @@ -41,5 +41,11 @@ REGISTER_KERNEL_BUILDER(Name("Square")
.TypeConstraint<int32>("T"),
UnaryOp<CPUDevice, functor::square<int32>>);
#endif
REGISTER_KERNEL_BUILDER(Name("Square")
.Device(DEVICE_DEFAULT)
.HostMemory("x")
.HostMemory("y")
.TypeConstraint<int32>("T"),
UnaryOp<CPUDevice, functor::square<int32>>);

} // namespace tensorflow
9 changes: 9 additions & 0 deletions tensorflow/core/kernels/cwise_op_squared_difference.cc
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Expand Up @@ -38,4 +38,13 @@ REGISTER_KERNEL_BUILDER(
.TypeConstraint<int32>("T"),
BinaryOp<CPUDevice, functor::squared_difference<int32>>);

REGISTER_KERNEL_BUILDER(
Name("SquaredDifference")
.Device(DEVICE_DEFAULT)
.HostMemory("x")
.HostMemory("y")
.HostMemory("z")
.TypeConstraint<int32>("T"),
BinaryOp<CPUDevice, functor::squared_difference<int32>>);

} // namespace tensorflow
7 changes: 7 additions & 0 deletions tensorflow/core/kernels/cwise_op_sub.cc
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Expand Up @@ -48,5 +48,12 @@ REGISTER_KERNEL_BUILDER(Name("Sub")
.TypeConstraint<int32>("T"),
BinaryOp<CPUDevice, functor::sub<int32>>);
#endif
REGISTER_KERNEL_BUILDER(Name("Sub")
.Device(DEVICE_DEFAULT)
.HostMemory("x")
.HostMemory("y")
.HostMemory("z")
.TypeConstraint<int32>("T"),
BinaryOp<CPUDevice, functor::sub<int32>>);

} // namespace tensorflow
5 changes: 5 additions & 0 deletions tensorflow/core/kernels/host_constant_op.cc
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Expand Up @@ -54,6 +54,11 @@ REGISTER_KERNEL_BUILDER(Name("Const")
_HostConstantOp);
#endif // GOOGLE_CUDA || TENSORFLOW_USE_ROCM

REGISTER_KERNEL_BUILDER(Name("Const")
.Device(DEVICE_DEFAULT)
.HostMemory("output")
.TypeConstraint<int32>("dtype"),
_HostConstantOp);

// HostConst: forced to generate output on the host.
REGISTER_KERNEL_BUILDER(Name("HostConst").Device(DEVICE_CPU), _HostConstantOp);
Expand Down
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