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PR #32812: [XLA:CPU] Add support for riscv64#103511

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exported_pr_827890705
Nov 5, 2025
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PR #32812: [XLA:CPU] Add support for riscv64#103511
copybara-service[bot] merged 1 commit intomasterfrom
exported_pr_827890705

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PR #32812: [XLA:CPU] Add support for riscv64

Imported from GitHub PR openxla/xla#32812

Co-author: @kxxt

📝 Summary of Changes:

This pull request adds support for RISC-V 64 architecture across the build system, code generation, and Python packaging infrastructure.

🎯 Justification:

The changes ensure that riscv64 is recognized as a valid target in Bazel build configurations, LLVM toolchain selection, Python manylinux compliance checks, and related tests and patches. This allows the project to build and test components for riscv64 alongside other supported architectures.

🚀 Kind of Contribution: ✨ New Feature

Copybara import of the project:

--
0d02393a6335fb43d67678d0cd15d671e77dc089 by gns [email protected]:

[XLA:CPU] Add support for riscv64

Co-authored-by: Levi Zim [email protected]

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5d95fb479e45524299ff4193b99bb4db0d74483b by gns [email protected]:

Refresh rules_python riscv64 patch

Co-authored-by: Levi Zim [email protected]

Merging this change closes #32812

FUTURE_COPYBARA_INTEGRATE_REVIEW=openxla/xla#32812 from infiWang:riscv64 5d95fb479e45524299ff4193b99bb4db0d74483b

@copybara-service copybara-service bot force-pushed the exported_pr_827890705 branch from 3748e5b to 66482eb Compare November 5, 2025 10:13
Imported from GitHub PR openxla/xla#32812

Co-author: @kxxt

📝 Summary of Changes:

This pull request adds support for RISC-V 64 architecture across the build system, code generation, and Python packaging infrastructure.

🎯 Justification:

The changes ensure that riscv64 is recognized as a valid target in Bazel build configurations, LLVM toolchain selection, Python manylinux compliance checks, and related tests and patches. This allows the project to build and test components for riscv64 alongside other supported architectures.

🚀 Kind of Contribution: ✨ New Feature

Copybara import of the project:

--
0d02393a6335fb43d67678d0cd15d671e77dc089 by gns <[email protected]>:

[XLA:CPU] Add support for riscv64

Co-authored-by: Levi Zim <[email protected]>

--
5d95fb479e45524299ff4193b99bb4db0d74483b by gns <[email protected]>:

Refresh `rules_python` riscv64 patch

Co-authored-by: Levi Zim <[email protected]>

Merging this change closes #32812

PiperOrigin-RevId: 828379922
@copybara-service copybara-service bot force-pushed the exported_pr_827890705 branch from 66482eb to 1abd188 Compare November 5, 2025 11:01
@copybara-service copybara-service bot merged commit 1abd188 into master Nov 5, 2025
@copybara-service copybara-service bot deleted the exported_pr_827890705 branch November 5, 2025 11:01
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