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sayantn
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Amanieu
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Update Intrinsics List to v3.6.9
Add `#[inline]` to avx512ifma intrinsics Fix the test equality. Remove the stability attributes in simd types and test functions
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-162858
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6 files changed

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-162858
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‎crates/core_arch/missing-x86.md

+3-3
Original file line numberDiff line numberDiff line change
@@ -249,23 +249,23 @@
249249
</p></details>
250250

251251

252-
<details><summary>["SHA512", "SHA512"]</summary><p>
252+
<details><summary>["SHA512", "AVX"]</summary><p>
253253

254254
* [ ] [`_mm256_sha512msg1_epi64`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_sha512msg1_epi64)
255255
* [ ] [`_mm256_sha512msg2_epi64`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_sha512msg2_epi64)
256256
* [ ] [`_mm256_sha512rnds2_epi64`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_sha512rnds2_epi64)
257257
</p></details>
258258

259259

260-
<details><summary>["SM3"]</summary><p>
260+
<details><summary>["SM3", "AVX"]</summary><p>
261261

262262
* [ ] [`_mm_sm3msg1_epi32`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_sm3msg1_epi32)
263263
* [ ] [`_mm_sm3msg2_epi32`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_sm3msg2_epi32)
264264
* [ ] [`_mm_sm3rnds2_epi32`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_sm3rnds2_epi32)
265265
</p></details>
266266

267267

268-
<details><summary>["SM4"]</summary><p>
268+
<details><summary>["SM4", "AVX"]</summary><p>
269269

270270
* [ ] [`_mm256_sm4key4_epi32`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_sm4key4_epi32)
271271
* [ ] [`_mm256_sm4rnds4_epi32`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_sm4rnds4_epi32)

‎crates/core_arch/src/simd.rs

+1-5
Original file line numberDiff line numberDiff line change
@@ -3,10 +3,9 @@
33
#![allow(non_camel_case_types)]
44

55
macro_rules! simd_ty {
6-
($(#[$stability:meta])? $id:ident [$ety:ident]: $($elem_name:ident),*) => {
6+
($id:ident [$ety:ident]: $($elem_name:ident),*) => {
77
#[repr(simd)]
88
#[derive(Copy, Clone, Debug, PartialEq)]
9-
$(#[$stability])?
109
pub(crate) struct $id { $(pub $elem_name: $ety),* }
1110

1211
#[allow(clippy::use_self)]
@@ -188,7 +187,6 @@ simd_ty!(i32x4[i32]: x0, x1, x2, x3);
188187
simd_ty!(i64x2[i64]: x0, x1);
189188

190189
simd_ty!(
191-
#[unstable(feature = "f16", issue = "116909")]
192190
f16x8[f16]:
193191
x0,
194192
x1,
@@ -372,7 +370,6 @@ simd_ty!(
372370
simd_ty!(i64x4[i64]: x0, x1, x2, x3);
373371

374372
simd_ty!(
375-
#[unstable(feature = "f16", issue = "116909")]
376373
f16x16[f16]:
377374
x0,
378375
x1,
@@ -722,7 +719,6 @@ simd_ty!(
722719
);
723720

724721
simd_ty!(
725-
#[unstable(feature = "f16", issue = "116909")]
726722
f16x32[f16]:
727723
x0,
728724
x1,

‎crates/core_arch/src/x86/avx512ifma.rs

+12
Original file line numberDiff line numberDiff line change
@@ -27,6 +27,7 @@ pub unsafe fn _mm512_madd52hi_epu64(a: __m512i, b: __m512i, c: __m512i) -> __m51
2727
/// from `k` when the corresponding mask bit is not set).
2828
///
2929
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#avx512techs=AVX512IFMA52&text=_mm512_mask_madd52hi_epu64)
30+
#[inline]
3031
#[target_feature(enable = "avx512ifma")]
3132
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
3233
#[cfg_attr(test, assert_instr(vpmadd52huq))]
@@ -47,6 +48,7 @@ pub unsafe fn _mm512_mask_madd52hi_epu64(
4748
/// out when the corresponding mask bit is not set).
4849
///
4950
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#avx512techs=AVX512IFMA52&text=_mm512_maskz_madd52hi_epu64)
51+
#[inline]
5052
#[target_feature(enable = "avx512ifma")]
5153
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
5254
#[cfg_attr(test, assert_instr(vpmadd52huq))]
@@ -82,6 +84,7 @@ pub unsafe fn _mm512_madd52lo_epu64(a: __m512i, b: __m512i, c: __m512i) -> __m51
8284
/// from `k` when the corresponding mask bit is not set).
8385
///
8486
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#avx512techs=AVX512IFMA52&text=_mm512_mask_madd52lo_epu64)
87+
#[inline]
8588
#[target_feature(enable = "avx512ifma")]
8689
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
8790
#[cfg_attr(test, assert_instr(vpmadd52luq))]
@@ -102,6 +105,7 @@ pub unsafe fn _mm512_mask_madd52lo_epu64(
102105
/// out when the corresponding mask bit is not set).
103106
///
104107
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#avx512techs=AVX512IFMA52&text=_mm512_maskz_madd52lo_epu64)
108+
#[inline]
105109
#[target_feature(enable = "avx512ifma")]
106110
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
107111
#[cfg_attr(test, assert_instr(vpmadd52luq))]
@@ -155,6 +159,7 @@ pub unsafe fn _mm256_madd52hi_epu64(a: __m256i, b: __m256i, c: __m256i) -> __m25
155159
/// from `k` when the corresponding mask bit is not set).
156160
///
157161
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#avx512techs=AVX512IFMA52&text=_mm256_mask_madd52hi_epu64)
162+
#[inline]
158163
#[target_feature(enable = "avx512ifma,avx512vl")]
159164
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
160165
#[cfg_attr(test, assert_instr(vpmadd52huq))]
@@ -175,6 +180,7 @@ pub unsafe fn _mm256_mask_madd52hi_epu64(
175180
/// out when the corresponding mask bit is not set).
176181
///
177182
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#avx512techs=AVX512IFMA52&text=_mm256_maskz_madd52hi_epu64)
183+
#[inline]
178184
#[target_feature(enable = "avx512ifma,avx512vl")]
179185
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
180186
#[cfg_attr(test, assert_instr(vpmadd52huq))]
@@ -228,6 +234,7 @@ pub unsafe fn _mm256_madd52lo_epu64(a: __m256i, b: __m256i, c: __m256i) -> __m25
228234
/// from `k` when the corresponding mask bit is not set).
229235
///
230236
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#avx512techs=AVX512IFMA52&text=_mm256_mask_madd52lo_epu64)
237+
#[inline]
231238
#[target_feature(enable = "avx512ifma,avx512vl")]
232239
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
233240
#[cfg_attr(test, assert_instr(vpmadd52luq))]
@@ -248,6 +255,7 @@ pub unsafe fn _mm256_mask_madd52lo_epu64(
248255
/// out when the corresponding mask bit is not set).
249256
///
250257
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#avx512techs=AVX512IFMA52&text=_mm256_maskz_madd52lo_epu64)
258+
#[inline]
251259
#[target_feature(enable = "avx512ifma,avx512vl")]
252260
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
253261
#[cfg_attr(test, assert_instr(vpmadd52luq))]
@@ -301,6 +309,7 @@ pub unsafe fn _mm_madd52hi_epu64(a: __m128i, b: __m128i, c: __m128i) -> __m128i
301309
/// from `k` when the corresponding mask bit is not set).
302310
///
303311
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#avx512techs=AVX512IFMA52&text=_mm_mask_madd52hi_epu64)
312+
#[inline]
304313
#[target_feature(enable = "avx512ifma,avx512vl")]
305314
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
306315
#[cfg_attr(test, assert_instr(vpmadd52huq))]
@@ -316,6 +325,7 @@ pub unsafe fn _mm_mask_madd52hi_epu64(a: __m128i, k: __mmask8, b: __m128i, c: __
316325
/// out when the corresponding mask bit is not set).
317326
///
318327
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#avx512techs=AVX512IFMA52&text=_mm_maskz_madd52hi_epu64)
328+
#[inline]
319329
#[target_feature(enable = "avx512ifma,avx512vl")]
320330
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
321331
#[cfg_attr(test, assert_instr(vpmadd52huq))]
@@ -364,6 +374,7 @@ pub unsafe fn _mm_madd52lo_epu64(a: __m128i, b: __m128i, c: __m128i) -> __m128i
364374
/// from `k` when the corresponding mask bit is not set).
365375
///
366376
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#avx512techs=AVX512IFMA52&text=_mm_mask_madd52lo_epu64)
377+
#[inline]
367378
#[target_feature(enable = "avx512ifma,avx512vl")]
368379
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
369380
#[cfg_attr(test, assert_instr(vpmadd52luq))]
@@ -379,6 +390,7 @@ pub unsafe fn _mm_mask_madd52lo_epu64(a: __m128i, k: __mmask8, b: __m128i, c: __
379390
/// out when the corresponding mask bit is not set).
380391
///
381392
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#avx512techs=AVX512IFMA52&text=_mm_maskz_madd52lo_epu64)
393+
#[inline]
382394
#[target_feature(enable = "avx512ifma,avx512vl")]
383395
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
384396
#[cfg_attr(test, assert_instr(vpmadd52luq))]

‎crates/core_arch/src/x86/test.rs

+3-9
Original file line numberDiff line numberDiff line change
@@ -38,10 +38,8 @@ pub unsafe fn get_m128(a: __m128, idx: usize) -> f32 {
3838

3939
#[track_caller]
4040
#[target_feature(enable = "avx512fp16")]
41-
#[unstable(feature = "stdarch_x86_avx512_f16", issue = "127213")]
4241
pub unsafe fn assert_eq_m128h(a: __m128h, b: __m128h) {
43-
// FIXME: use `_mm_cmp_ph_mask::<_CMP_EQ_OQ>` when it's implemented
44-
let r = _mm_cmpeq_epi16_mask(transmute(a), transmute(b));
42+
let r = _mm_cmp_ph_mask::<_CMP_EQ_OQ>(a, b);
4543
if r != 0b1111_1111 {
4644
panic!("{:?} != {:?}", a, b);
4745
}
@@ -90,10 +88,8 @@ pub unsafe fn get_m256(a: __m256, idx: usize) -> f32 {
9088

9189
#[track_caller]
9290
#[target_feature(enable = "avx512fp16")]
93-
#[unstable(feature = "stdarch_x86_avx512_f16", issue = "127213")]
9491
pub unsafe fn assert_eq_m256h(a: __m256h, b: __m256h) {
95-
// FIXME: use `_mm256_cmp_ph_mask::<_CMP_EQ_OQ>` when it's implemented
96-
let r = _mm256_cmpeq_epi16_mask(transmute(a), transmute(b));
92+
let r = _mm256_cmp_ph_mask::<_CMP_EQ_OQ>(a, b);
9793
if r != 0b11111111_11111111 {
9894
panic!("{:?} != {:?}", a, b);
9995
}
@@ -164,10 +160,8 @@ pub unsafe fn assert_eq_m512d(a: __m512d, b: __m512d) {
164160

165161
#[track_caller]
166162
#[target_feature(enable = "avx512fp16")]
167-
#[unstable(feature = "stdarch_x86_avx512_f16", issue = "127213")]
168163
pub unsafe fn assert_eq_m512h(a: __m512h, b: __m512h) {
169-
// FIXME: use `_mm512_cmp_ph_mask::<_CMP_EQ_OQ>` when it's implemented
170-
let r = _mm512_cmpeq_epi16_mask(transmute(a), transmute(b));
164+
let r = _mm512_cmp_ph_mask::<_CMP_EQ_OQ>(a, b);
171165
if r != 0b11111111_11111111_11111111_11111111 {
172166
panic!("{:?} != {:?}", a, b);
173167
}

‎crates/stdarch-verify/tests/x86-intel.rs

+1-1
Original file line numberDiff line numberDiff line change
@@ -161,7 +161,7 @@ fn verify_all_signatures() {
161161
// https://software.intel.com/sites/landingpage/IntrinsicsGuide/#
162162
//
163163
// Open up the network console and you'll see an xml file was downloaded
164-
// (currently called data-3.6.8.xml). That's the file we downloaded
164+
// (currently called data-3.6.9.xml). That's the file we downloaded
165165
// here.
166166
let xml = include_bytes!("../x86-intel.xml");
167167

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