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Make mstateen0 P1P13 and ENVCFG read-only zero when their CSRs don't exist - #2467

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aswaterman merged 2 commits into
riscv-software-src:masterfrom
r3wretrhy:fix/mstateen0-unimplemented-bits-2464
Oct 9, 2026
Merged

aswaterman merged 2 commits into
riscv-software-src:masterfrom
r3wretrhy:fix/mstateen0-unimplemented-bits-2464

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Fixes #2464

mstateen0 bits that control state the hart doesn't implement have to be read-only zero, but two of them were writable:

  • P1P13 (bit 56) controls hedelegh, which only exists on RV32 with H. Implement hedelegh, gated by mstateen0.P1P13 #2439 made it writable whenever H is present, including RV64.
  • ENVCFG (bit 62) controls senvcfg (and henvcfg), which need S-mode, but it was writable with --priv=mu.

This only adds P1P13 to the mstateen0 mask when xlen == 32, and ENVCFG when S is supported. hstateen0 shares that mask but only exists with H, so nothing changes for it.

Tested: built spike from fdc1ffa with and without this change and ran the stateen_ro0 reproducer from the issue (riscv64-unknown-elf-gcc 14.2):

master this PR
--isa=rv64gch_smstateen FAILED (tohost = 1) pass
--isa=rv32gch_smstateen pass pass
--priv=mu --isa=rv64gc_smstateen FAILED (tohost = 64) pass
--priv=mu --isa=rv32gc_smstateen FAILED (tohost = 64) pass

I also wrote all ones to mstateen0/mstateen0h and read back bits 63:56 to check nothing else moved: P1P13 still sticks on rv32gch, and ENVCFG still sticks on rv64gc/rv32gc with S. seip-rmw and wfi-as-nop from ci-tests still pass.

…exist

P1P13 controls hedelegh, which only exists on RV32 with H, and ENVCFG
controls senvcfg/henvcfg, which need S-mode. Smstateen requires stateen
bits for unimplemented state to be read-only zero.

Fixes #2464

Signed-off-by: Zhaoqi Xu <[email protected]>

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Thanks!

@aswaterman
aswaterman merged commit d6cfe9e into riscv-software-src:master Oct 9, 2026
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mstateen0.P1P13 is writable on RV64, and mstateen0.ENVCFG is writable without S-mode

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