enable unaligned access optimizations for RISC-V with Zicclsm#14342
Merged
sundb merged 1 commit intoredis:unstablefrom Oct 11, 2025
Merged
enable unaligned access optimizations for RISC-V with Zicclsm#14342sundb merged 1 commit intoredis:unstablefrom
sundb merged 1 commit intoredis:unstablefrom
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🎉 Snyk checks have passed. No issues have been found so far.✅ security/snyk check is complete. No issues have been found. (View Details) ✅ license/snyk check is complete. No issues have been found. (View Details) |
sundb
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state:to-be-merged
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Hi @fcostaoliveira ,please take a look at this PR when you have time. If you have any questions or suggestions for revisions, I will actively cooperate. Thank you. |
sundb
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Oct 11, 2025
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@Polaris-911 merged, thx. |
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While reviewing the Redis code, we discovered that optimizations for unaligned memory accesses are not enabled on RISC-V. After testing siphash separately, we found some performance improvements in this area and hope to add them.
The zicclsm extension, which includes unaligned memory accesses, is required on RISC-V, as specified in the RVA20U64 specification. GCC also provides the macro zicclsm to detect the zicclsm extension.
Supported versions: GCC 14.1.0 and above
Test data
environment information
Test Configuration
Test Iterations: 10,000,000 hashes per run
Test Runs: 10 consecutive runs
Improvement
6482733.40 --> 10732524.90 (+65.5%)
Disable UNALIGNED_LE_CPU
Enable UNALIGNED_LE_CPU