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James Hoganbonzini
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KVM: MIPS: Make ERET handle ERL before EXL
The ERET instruction to return from exception is used for returning from exception level (Status.EXL) and error level (Status.ERL). If both bits are set however we should be returning from ERL first, as ERL can interrupt EXL, for example when an NMI is taken. KVM however checks EXL first. Fix the order of the checks to match the pseudocode in the instruction set manual. Fixes: e685c68 ("KVM/MIPS32: Privileged instruction/target branch emulation.") Signed-off-by: James Hogan <[email protected]> Cc: Paolo Bonzini <[email protected]> Cc: "Radim Krčmář <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: [email protected] Cc: [email protected] Cc: <[email protected]> # 3.10.x- Signed-off-by: Paolo Bonzini <[email protected]>
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Lines changed: 4 additions & 4 deletions

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arch/mips/kvm/emulate.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -790,15 +790,15 @@ enum emulation_result kvm_mips_emul_eret(struct kvm_vcpu *vcpu)
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struct mips_coproc *cop0 = vcpu->arch.cop0;
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enum emulation_result er = EMULATE_DONE;
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793-
if (kvm_read_c0_guest_status(cop0) & ST0_EXL) {
793+
if (kvm_read_c0_guest_status(cop0) & ST0_ERL) {
794+
kvm_clear_c0_guest_status(cop0, ST0_ERL);
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vcpu->arch.pc = kvm_read_c0_guest_errorepc(cop0);
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} else if (kvm_read_c0_guest_status(cop0) & ST0_EXL) {
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kvm_debug("[%#lx] ERET to %#lx\n", vcpu->arch.pc,
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kvm_read_c0_guest_epc(cop0));
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kvm_clear_c0_guest_status(cop0, ST0_EXL);
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vcpu->arch.pc = kvm_read_c0_guest_epc(cop0);
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799-
} else if (kvm_read_c0_guest_status(cop0) & ST0_ERL) {
800-
kvm_clear_c0_guest_status(cop0, ST0_ERL);
801-
vcpu->arch.pc = kvm_read_c0_guest_errorepc(cop0);
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} else {
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kvm_err("[%#lx] ERET when MIPS_SR_EXL|MIPS_SR_ERL == 0\n",
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vcpu->arch.pc);

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