Encode rotated immediates in arm32 data processing instructions ##arch - #27140

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Description

arm32 data processing instructions with an immediate above 255 were assembled with the wrong constant , without an error :

TYPE_ARI only searched for a rotation when the value was a power of two , and every other value went through (imm << 24) | 2 , which keeps the low 8 bits . 0x80000000 did not even reach the search , as an int it is negative . the mov path already had getimmed8 , which tries every even rotation and sets err when there is none , so add , adc , sub , sbc , rsb , rsc , and , orr , eor and bic , and the s forms the table has , use it too now . a value with no 8 bit rotated form is refused , as llvm-mc and gas do .

found by decoding random words with llvm-mc ( -triple=armv7 ) , assembling the text with rasm2 -a arm -b 32 and decoding the result again . same as llvm went from 618 to 764 of 3459 , nothing that was right changed , and the set that does not assemble is the same . the 7 new lines in db/asm/arm_32 and the new test in db/tools/rasm2 fail before the change , 3 lines that were marked broken in arm_32 ( andeq r3, r5, 0x80000000 and the two orreq r3, r3 ones ) pass now and are unmarked . db/asm has no failures .

this touches a different part of armass.c than #27137 , they do not conflict .