Move empty size logic from ATen into TH/THC. #8468

gchanan · 2018-06-14T02:17:32Z

The goal here is to unify the tensor representations; since the "majority" of the representation is in TH, we push the empty size ({0}) and empty stride ({1}) logic into TH.

This PR does the following:

Previously THTensor/THCTensor with dim_ == 0, size == nullptr, stride == nullptr are now dim_ == 1, size == {0}, stride == {1}.
The logic that previously implemented this at the ATen level (e.g. THLongStorageView STRIDE_EMPTY_TENSOR) is removed.
The above is pretty clean except for resize/resizeNd logic -- that is still called with nDimension == 0. So, we rename these to resizeLegacy, resizeNdLegacy, map nDimension == 1
into the new regime, and will later write a empty-aware resize/resizeNd and move over the calls to resizeLegacy, resizeNdLegacy.
Also introduces some ifdefs that are just used for testing:
a) USE_TH_SCALAR: move scalar logic in TH
b) USE_TH_ZERO_SIZE_DIM: support arbitrary 0-sized dimensions, i.e {...,0,...}.
These are just used to write forward-looking correct code while call sites to _dim() (old TH nDimension) and resizeLegacy are updated.

The goal here is to unify the tensor representations; since the "majority" of the representation is in TH, we push the empty size ({0}) and empty stride ({1}) logic into TH. This PR does the following: 1) Previously THTensor/THCTensor with dim_ == 0, size == nullptr, stride == nullptr are now dim_ == 1, size == {0}, stride == {1}. 2) The logic that previously implemented this at the ATen level (e.g. THLongStorageView STRIDE_EMPTY_TENSOR) is removed. 3) The above is pretty clean except for resize/resizeNd logic -- that is still called with nDimension == 0. So, we rename these to resizeLegacy, resizeNdLegacy, map nDimension == 1 into the new regime, and will later write a empty-aware resize/resizeNd and move over the calls to resizeLegacy, resizeNdLegacy. 4) Also introduces some ifdefs that are just used for testing: a) USE_TH_SCALAR: move scalar logic in TH b) USE_TH_ZERO_SIZE_DIM: support arbitrary 0-sized dimensions, i.e {...,0,...}. These are just used to write forward-looking correct code while call sites to _dim() (old TH nDimension) and resizeLegacy are updated.

gchanan · 2018-06-14T03:08:48Z

@pytorchbot retest this please.

aten/src/ATen/THLongStorageView.h

-  : zero_dim_to_null(false)
  {
    // zero_dim_to_one converts an empty ArrayRef into [1]
-    // zero_dim_to_null converts an empty ArrayRef into a null THLongStorage


aten/src/ATen/THLongStorageView.h

 }

 enum class THLongStorageViewKind {
-  SIZE,


aten/src/ATen/THLongStorageView.h

-    }
+    bool zero_dim_to_one = kind == THLongStorageViewKind::SIZE_STRIDE;
+
    if(zero_dim_to_one && ref.size() == 0) {


aten/src/TH/generic/THTensor.cpp


 /* Resize */
-void THTensor_(resize)(THTensor *self, THLongStorage *size, THLongStorage *stride)
+void THTensor_(resizeLegacy)(THTensor *self, THLongStorage *size, THLongStorage *stride)


aten/src/TH/generic/THTensor.cpp

    src = self;

+#ifndef USE_TH_SCALAR
  THArgCheck(src->_dim() > 1, 1, "cannot select on a vector");


aten/src/TH/generic/THTensor.cpp

-  self->size = NULL;
-  self->stride = NULL;
-  self->dim_ = 0;
+  self->size = (int64_t *)THAlloc(sizeof(int64_t));


aten/src/TH/generic/THTensor.h

 TH_API void THTensor_(resize4d)(THTensor *tensor, int64_t size0_, int64_t size1_, int64_t size2_, int64_t size3_);
 TH_API void THTensor_(resize5d)(THTensor *tensor, int64_t size0_, int64_t size1_, int64_t size2_, int64_t size3_, int64_t size4_);
+// Note: these are legacy resize functions that treat sizes as size->size == 0 and size->data<int64_t>() as being 0-terminated.
+// There will be new resize functions to call that fully support dimensions of size 0.


aten/src/THS/generic/THSTensor.hpp

+
+    inline int64_t dim() const {
+      // FixME: nDimensionI and nDimensionV should be set correctly by THS
+      return (nDimensionI + nDimensionV) == 0 ? 1 : (nDimensionI + nDimensionV);


ezyang

So beauuuuutiful

…agic that needs these to be nullptrs).

gchanan · 2018-06-14T19:11:07Z

@pytorchbot retest this please.

gchanan · 2018-06-14T19:54:11Z

caffe2 failure looks not related.

gchanan requested review from apaszke, colesbury, ezyang, soumith and zdevito as code owners June 14, 2018 02:17

gchanan mentioned this pull request Jun 14, 2018

Port THS to ATen. #8409

Merged