pytorch · ngoldbaum · Nov 22, 2019 · Nov 26, 2019 · Nov 26, 2019 · Nov 26, 2019
diff --git a/aten/src/ATen/SparseTensorImpl.cpp b/aten/src/ATen/SparseTensorImpl.cpp
@@ -99,7 +99,7 @@ void SparseTensorImpl::set_indices_and_values_unsafe(const Tensor& indices, cons
   TORCH_CHECK(values.device().type() == device().type(), "device type of values (", values.device().type(), ") must match device type of device().type()", device().type(), ")");
   TORCH_CHECK(values.scalar_type() == typeMetaToScalarType(dtype()), "dtype of values (", values.scalar_type(), ") must match dtype of sparse tensor (", typeMetaToScalarType(dtype()), ")");
   TORCH_CHECK(indices.scalar_type() == kLong, "indices must be an int64 tensor");
-  TORCH_CHECK(indices.type().backend() == values.type().backend(), "backend of indices (", indices.type().backend(), ") must match backend of values (", values.type().backend(), ")");
+  TORCH_CHECK(indices.options().backend() == values.options().backend(), "backend of indices (", indices.options().backend(), ") must match backend of values (", values.options().backend(), ")");
   TORCH_CHECK(!indices.is_cuda() || indices.get_device() == values.get_device(), "device of indices (", indices.get_device(), ") must match device of values (", values.get_device(), ")");
 
   TORCH_CHECK(indices.dim() == 2, "indices must be sparse_dim x nnz, but got: ", indices.sizes());

diff --git a/aten/src/ATen/TensorUtils.cpp b/aten/src/ATen/TensorUtils.cpp
@@ -134,7 +134,7 @@ void checkAllSameGPU(CheckedFrom c, ArrayRef<TensorArg> tensors) {
 
 void checkSameType(CheckedFrom c, const TensorArg& t1, const TensorArg& t2) {
   TORCH_CHECK(
-    t1->type() == t2->type(),
+    t1->options().type_equal(t2->options()),
     "Expected tensor for ", t1, " to have the same type as tensor for ", t2,
     "; but type ", t1->toString(), " does not equal ", t2->toString(),
     " (while checking arguments for ", c, ")");
@@ -196,9 +196,9 @@ void checkAllDefined(CheckedFrom c, ArrayRef<TensorArg> ts) {
 
 void checkBackend(CheckedFrom c, const Tensor& t, Backend backend) {
   TORCH_CHECK(
-    !t.defined() || t.type().backend() == backend,
+    !t.defined() || t.options().backend() == backend,
     "Expected tensor to have ", toString(backend),
-    " Backend, but got tensor with ", toString(t.type().backend()), " Backend ",
+    " Backend, but got tensor with ", toString(t.options().backend()), " Backend ",
     "(while checking arguments for ", c, ")");
 }
 
@@ -210,9 +210,9 @@ void checkBackend(CheckedFrom c, at::ArrayRef<Tensor> tensors, at::Backend backe
 
 void checkDeviceType(CheckedFrom c, const Tensor& t, DeviceType device_type) {
   TORCH_CHECK(
-      !t.defined() || t.type().device_type() == device_type,
+      !t.defined() || t.device().type() == device_type,
       "Expected tensor to have ", device_type,
-      " DeviceType, but got tensor with ", t.type().device_type(), " DeviceType ",
+      " DeviceType, but got tensor with ", t.device().type(), " DeviceType ",
       "(while checking arguments for ", c, ")");
 }
 

diff --git a/aten/src/ATen/core/Tensor.cpp b/aten/src/ATen/core/Tensor.cpp
@@ -28,14 +28,20 @@ void Tensor::enforce_invariants() {
 
 void Tensor::print() const {
   if (defined()) {
-    std::cerr << "[" << type().toString() << " " << sizes() << "]" << std::endl;
+    std::cerr << "[" << toString() << " " << sizes() << "]" << std::endl;
   } else {
     std::cerr << "[UndefinedTensor]" << std::endl;
   }
 }
 
 std::string Tensor::toString() const {
-  return type().toString();
+  std::string base_str;
+  if (scalar_type() == ScalarType::Undefined) {
+    base_str = "UndefinedType";
+  } else {
+    base_str = std::string(at::toString(options().backend())) + at::toString(scalar_type()) + "Type";
+  }
+  return base_str;
 }
 
 Tensor Tensor::variable_data() const {

diff --git a/aten/src/ATen/native/Convolution.cpp b/aten/src/ATen/native/Convolution.cpp
@@ -179,7 +179,7 @@ auto ConvParams::use_mkldnn(const at::Tensor& input) const -> bool {
     return false;
   }
   return (input.is_mkldnn()) || // input is mkldnn Tensor
-    (input.type().backend() == at::Backend::CPU &&
+    (input.options().backend() == at::Backend::CPU &&
      input.scalar_type() == kFloat && // only on CPU Float Tensors
      !is_dilated() && // doesn't support dilation
      !transposed && // or transposed tensors
@@ -190,7 +190,7 @@ auto ConvParams::use_mkldnn(const at::Tensor& input) const -> bool {
 auto ConvParams::use_nnpack(const at::Tensor& input) const -> bool {
 #if AT_NNPACK_ENABLED()
   return at::_nnpack_available() &&
-         input.type().backend() == at::Backend::CPU &&
+         input.options().backend() == at::Backend::CPU &&
          input.scalar_type() == kFloat && // only on CPU Float Tensors
          !is_dilated() && // or dilation
          !transposed &&   // or transposed tensors
@@ -594,11 +594,11 @@ at::Tensor _convolution(
           output = at::thnn_conv_depthwise2d(input.contiguous(), weight, kernel_size, bias, stride, padding, dilation);
       }
   } else if (params.use_cudnn(input)) {
-    TORCH_CHECK(input.type() == weight.type(),
-             "Input type (", input.type().toString(), ") and weight type (", weight.type().toString(),
+    TORCH_CHECK(input.options().type_equal(weight.options()),
+             "Input type (", input.toString(), ") and weight type (", weight.toString(),
              ") should be the same");
-    TORCH_CHECK(!bias.defined() || (input.type() == bias.type()),
-             "Input type (", input.type().toString(), ") and bias type (", bias.type().toString(),
+    TORCH_CHECK(!bias.defined() || (input.options().type_equal(bias.options())),
+             "Input type (", input.toString(), ") and bias type (", bias.toString(),
              ") should be the same");
 
     if (params.transposed) {
@@ -611,11 +611,11 @@ at::Tensor _convolution(
           params.padding, params.stride, params.dilation, params.groups, params.benchmark, params.deterministic);
     }
   } else if (params.use_miopen(input)) {
-    TORCH_CHECK(input.type() == weight.type(),
-             "Input type (", input.type().toString(), ") and weight type (", weight.type().toString(),
+    TORCH_CHECK(input.options().type_equal(weight.options()),
+             "Input type (", input.toString(), ") and weight type (", weight.toString(),
              ") should be the same");
-    TORCH_CHECK(!bias.defined() || (input.type() == bias.type()),
-             "Input type (", input.type().toString(), ") and bias type (", bias.type().toString(),
+    TORCH_CHECK(!bias.defined() || (input.options().type_equal(bias.options())),
+             "Input type (", input.toString(), ") and bias type (", bias.toString(),
              ") should be the same");
 
     if (params.transposed) {
@@ -629,11 +629,11 @@ at::Tensor _convolution(
     }
   } else if (params.use_mkldnn(input)) {
 #if AT_MKLDNN_ENABLED()
-    TORCH_CHECK(input.type() == weight.type(),
-             "Input type (", input.type().toString(), ") and weight type (", weight.type().toString(),
+    TORCH_CHECK(input.options().type_equal(weight.options()),
+             "Input type (", input.toString(), ") and weight type (", weight.toString(),
              ") should be the same");
-    TORCH_CHECK(!bias.defined() || (input.type() == bias.type()),
-             "Input type (", input.type().toString(), ") and bias type (", bias.type().toString(),
+    TORCH_CHECK(!bias.defined() || (input.options().type_equal(bias.options())),
+             "Input type (", input.toString(), ") and bias type (", bias.toString(),
              ") should be the same");
     if (!input_is_mkldnn) {
       output = at::mkldnn_convolution(input.contiguous(), weight.contiguous(), bias.defined() ? bias.contiguous() : bias,

diff --git a/aten/src/ATen/native/Copy.cpp b/aten/src/ATen/native/Copy.cpp
@@ -95,7 +95,7 @@ static Tensor & copy_impl(Tensor & self, const Tensor & src, bool non_blocking)
     return at::copy_sparse_to_sparse_(self, src, non_blocking);
   } else if (self.is_sparse() || src.is_sparse()) {
     AT_ERROR("copy_() between dense and sparse Tensors is not implemented! Found self type = ",
-             self.type(), " and src type = ", src.type());
+             self.toString(), " and src type = ", src.toString());
   }
 
   if (self.is_same(src)) {

diff --git a/aten/src/ATen/native/Cross.cpp b/aten/src/ATen/native/Cross.cpp
@@ -15,11 +15,11 @@ Tensor cross(const Tensor & input, const Tensor & other, const c10::optional<int
 }
 
 Tensor & cross_out(Tensor & out, const Tensor & input, const Tensor & other, const c10::optional<int64_t> dimension) {
-  auto device_res = input.type().device_type();
+  auto device_res = input.device().type();
   TORCH_CHECK(device_res == kCPU || device_res == kCUDA, "cross only supports CPU and CUDA devices, out got: ", device_res);
-  auto device1 = input.type().device_type();
+  auto device1 = input.device().type();
   TORCH_CHECK(device1 == kCPU || device1 == kCUDA, "cross only supports CPU and CUDA devices, input got: ", device1);
-  auto device2 = other.type().device_type();
+  auto device2 = other.device().type();
   TORCH_CHECK(device2 == kCPU || device2 == kCUDA, "cross only supports CPU and CUDA devices, other got: ", device2);
   TORCH_CHECK(device_res == device1, "out and input must have the same device type. out: ", device_res, " input: ", device1);
   TORCH_CHECK(device1 == device2, "input and other must have the same device type. input: ", device1, " other: ", device2);

diff --git a/aten/src/ATen/native/Distance.cpp b/aten/src/ATen/native/Distance.cpp
@@ -39,10 +39,10 @@ Tensor euclidean_dist_out(const Tensor& x1, const Tensor& x2) {
 
 static Tensor cdist_impl(const Tensor& x1, const Tensor& x2, const double p, c10::optional<int64_t> compute_mode) {
   TORCH_CHECK(at::isFloatingType(x1.scalar_type()), "cdist only supports floating-point dtypes, X1 got: ", x1.scalar_type());
-  auto device1 = x1.type().device_type();
+  auto device1 = x1.device().type();
   TORCH_CHECK(device1 == kCPU || device1 == kCUDA, "cdist only supports CPU and CUDA devices, X1 got: ", device1);
   TORCH_CHECK(at::isFloatingType(x1.scalar_type()), "cdist only supports floating-point dtypes, X2 got: ", x2.scalar_type());
-  auto device2 = x2.type().device_type();
+  auto device2 = x2.device().type();
   TORCH_CHECK(device2 == kCPU || device2 == kCUDA, "cdist only supports CPU and CUDA devices, X2 got: ", device2);
   TORCH_CHECK(p >= 0, "cdist only supports non-negative p values");
   TORCH_CHECK(device1 == device2, "X1 and X2 must have the same device type. X1: ", device1, " X2: ", device2);
@@ -123,9 +123,9 @@ Tensor _cdist_backward(const Tensor& grad, const Tensor& x1, const Tensor& x2, c
   TORCH_CHECK(grad.is_contiguous(), "_cdist_backward requires grad to be contiguous");
   int64_t n = x1.size(-2);
   int64_t m = x1.size(-1);
-  auto device1 = x1.type().device_type();
+  auto device1 = x1.device().type();
   TORCH_CHECK(device1 == kCPU || device1 == kCUDA, "_cdist_backward only supports CPU and CUDA devices, X1 got: ", device1);
-  auto device2 = x2.type().device_type();
+  auto device2 = x2.device().type();
   TORCH_CHECK(device2 == kCPU || device2 == kCUDA, "_cdist_backward only supports CPU and CUDA devices, X2 got: ", device2);
   IntArrayRef batch_tensor1(x1.sizes().data(), std::max<int64_t>(x1.dim() - 2, 0));
   int batch_product = std::accumulate(batch_tensor1.begin(), batch_tensor1.end(), 1, std::multiplies<int64_t>());
@@ -136,7 +136,7 @@ Tensor _cdist_backward(const Tensor& grad, const Tensor& x1, const Tensor& x2, c
 
 Tensor _pdist_forward(const Tensor& self, const double p) {
   TORCH_CHECK(self.is_contiguous(), "_pdist_forward requires contiguous input");
-  auto device = self.type().device_type();
+  auto device = self.device().type();
   TORCH_CHECK(device == kCPU || device == kCUDA, "_pdist_forward only supports CPU and CUDA devices, got: ", device);
   Tensor result = at::empty({0}, self.options(), LEGACY_CONTIGUOUS_MEMORY_FORMAT);
   if (self.size(0) <= 1) {
@@ -157,7 +157,7 @@ Tensor _pdist_forward(const Tensor& self, const double p) {
 Tensor _pdist_backward(const Tensor& grad, const Tensor& self, const double p, const Tensor& pdist) {
   TORCH_CHECK(self.is_contiguous(), "_pdist_backward requires self to be contiguous");
   TORCH_CHECK(pdist.is_contiguous(), "_pdist_backward requires pdist to be contiguous");
-  auto device = self.type().device_type();
+  auto device = self.device().type();
   TORCH_CHECK(device == kCPU || device == kCUDA, "_pdist_backward only supports CPU and CUDA devices, got: ", device);
   Tensor result = at::empty_like(self, LEGACY_CONTIGUOUS_MEMORY_FORMAT);
   pdist_backward_stub(device, result, grad, self, p, pdist);

diff --git a/aten/src/ATen/native/Distributions.cpp b/aten/src/ATen/native/Distributions.cpp
@@ -321,7 +321,7 @@ Tensor& multinomial_out(Tensor& result, const Tensor& self, int64_t n_sample, bo
   } else {
     result.resize_({n_sample});
   }
-  multinomial_stub(result.type().device_type(), result, self, n_sample, with_replacement, gen);
+  multinomial_stub(result.device().type(), result, self, n_sample, with_replacement, gen);
   return result;
 }
 

diff --git a/aten/src/ATen/native/Indexing.cpp b/aten/src/ATen/native/Indexing.cpp
@@ -165,7 +165,7 @@ AdvancedIndex::AdvancedIndex(const Tensor& src, TensorList indices_list)
 
   // For CUDA tensors, force all index tensors to have the same striding to
   // simplify the CUDA kernel.
-  if (indices.size() >= 2 && this->src.type().device_type() == kCUDA) {
+  if (indices.size() >= 2 && this->src.device().type() == kCUDA) {
     if (!all_strides_match(indices)) {
       for (size_t i = 0; i < indices.size(); i++) {
         indices[i] = indices[i].contiguous();
@@ -251,8 +251,8 @@ Tensor & _index_put_impl_(Tensor & self, TensorList indices, const Tensor & valu
   if (indices.size() > (size_t)self.dim()) {
     AT_INDEX_ERROR("too many indices for tensor of dimension ", self.dim(), " (got ", indices.size(), ")");
   }
-  if (accumulate && self.type().device_type() == kCUDA) {
-      index_put_accum_stub(self.type().device_type(), self, indices, value, unsafe);
+  if (accumulate && self.device().type() == kCUDA) {
+      index_put_accum_stub(self.device().type(), self, indices, value, unsafe);
       return self;
   }
   auto info = make_info(self, indices);

diff --git a/aten/src/ATen/native/LinearAlgebra.cpp b/aten/src/ATen/native/LinearAlgebra.cpp
@@ -88,7 +88,7 @@ std::tuple<Tensor, Tensor> slogdet(const Tensor& self) {
 
 Tensor pinverse(const Tensor& self, double rcond) {
   TORCH_CHECK((at::isFloatingType(self.scalar_type()) || at::isComplexType(self.scalar_type())) && self.dim() >= 2,
-              "pinverse(", self.type(), "{", self.sizes(), "}): expected a tensor with 2 or more dimensions "
+              "pinverse(", self.scalar_type(), "{", self.sizes(), "}): expected a tensor with 2 or more dimensions "
               "of floating types");
   if (self.numel() == 0) {
     // Match NumPy
@@ -118,7 +118,7 @@ static inline Tensor _matrix_rank_helper(const Tensor& self, bool symmetric) {
 
 Tensor matrix_rank(const Tensor& self, double tol, bool symmetric) {
   TORCH_CHECK((at::isFloatingType(self.scalar_type()) || at::isComplexType(self.scalar_type())) && self.dim() == 2,
-              "matrix_rank(", self.type(), "{", self.sizes(), "}): expected a 2D tensor "
+              "matrix_rank(", self.scalar_type(), "{", self.sizes(), "}): expected a 2D tensor "
               "of floating types");
 
   Tensor S = _matrix_rank_helper(self, symmetric);
@@ -127,7 +127,7 @@ Tensor matrix_rank(const Tensor& self, double tol, bool symmetric) {
 
 Tensor matrix_rank(const Tensor& self, bool symmetric) {
   TORCH_CHECK((at::isFloatingType(self.scalar_type()) || at::isComplexType(self.scalar_type())) && self.dim() == 2,
-              "matrix_rank(", self.type(), "{", self.sizes(), "}): expected a 2D tensor "
+              "matrix_rank(", self.scalar_type(), "{", self.sizes(), "}): expected a 2D tensor "
               "of floating types");
 
   Tensor S = _matrix_rank_helper(self, symmetric);
@@ -479,7 +479,7 @@ Tensor& matmul_out(Tensor &result, const Tensor & tensor1, const Tensor & tensor
 
 Tensor matrix_power(const Tensor& a, int64_t n) {
   TORCH_CHECK(a.dim() >= 2 && (at::isFloatingType(a.scalar_type()) || at::isComplexType(a.scalar_type())),
-              "matrix_power(", a.type(), "{", a.sizes(), "}): expected a tensor "
+              "matrix_power(", a.scalar_type(), "{", a.sizes(), "}): expected a tensor "
               "of floating types with dim at least 2");
   if (n == 0) {
     return a.clone(at::MemoryFormat::Contiguous).copy_(at::eye(a.size(-2), a.options()).expand_as(a));

diff --git a/aten/src/ATen/native/Memory.cpp b/aten/src/ATen/native/Memory.cpp
@@ -14,8 +14,8 @@ bool is_pinned(const Tensor& self) {
 }
 
 Tensor pin_memory(const Tensor& self) {
-  if (self.type().backend() != Backend::CPU) {
-    AT_ERROR("cannot pin '", self.type().toString(), "' only dense CPU tensors can be pinned");
+  if (self.options().backend() != Backend::CPU) {
+    AT_ERROR("cannot pin '", self.toString(), "' only dense CPU tensors can be pinned");
   }
   if (self.is_pinned()) {
     return self;

diff --git a/aten/src/ATen/native/PackedSequence.cpp b/aten/src/ATen/native/PackedSequence.cpp
@@ -4,7 +4,7 @@
 namespace at { namespace native {
 
 void checkLongTensor(const Tensor& tensor) {
-  TORCH_CHECK(tensor.dim() == 1 && tensor.type().device_type() == at::kCPU && tensor.scalar_type() == at::kLong,
+  TORCH_CHECK(tensor.dim() == 1 && tensor.device().type() == at::kCPU && tensor.scalar_type() == at::kLong,
            "'lengths' argument should be a 1D CPU int64 tensor");
 }
 

diff --git a/aten/src/ATen/native/PointwiseOps.cpp b/aten/src/ATen/native/PointwiseOps.cpp
@@ -35,7 +35,7 @@ Tensor& addcmul_out(
     const Tensor& tensor1,
     const Tensor& tensor2,
     Scalar value) {
-  checkBackend("addcmul_cpu", result, self.type().backend());
+  checkBackend("addcmul_cpu", result, self.options().backend());
   auto iter = at::TensorIterator();
   iter.set_check_mem_overlap(true);
   iter.add_output(result);
@@ -70,7 +70,7 @@ Tensor& addcdiv_out(
     const Tensor& tensor1,
     const Tensor& tensor2,
     Scalar value) {
-  checkBackend("addcdiv_cpu", result, self.type().backend());
+  checkBackend("addcdiv_cpu", result, self.options().backend());
   auto iter = at::TensorIterator();
   iter.set_check_mem_overlap(true);
   iter.add_output(result);