[c10d][Sym mem] Make nccl backend full fledged with nccl 2.28.9-1#170389
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[c10d][Sym mem] Make nccl backend full fledged with nccl 2.28.9-1#170389pytorchbot wants to merge 1 commit intorelease/2.10from
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…68129) (This PR will be rebased on #166174) (There are other PR which updates NCCL version: #168091) We did the following thing: 1. To add exchange of buffer ptr and signal pad ptr via NCCL device API introduced in nccl 2.28. 2. With #1, we showed that the symmem from nccl backend works with existing one_shot_all_reduce kernel (Add a UT for it) 3. Add a simple put, put with signal, wait for signal and get. So that symmem's one side API works. 4. Show that symmem from nccl backend works with traditional c10d collective as well in UT. 5. Stored DevComm inside symmetric memory so that users can access to it for customized kernel. Resolves #167682 Pull Request resolved: #168129 Approved by: https://github.com/kwen2501, https://github.com/ngimel, https://github.com/atalman (cherry picked from commit c907c77)
🔗 Helpful Links🧪 See artifacts and rendered test results at hud.pytorch.org/pr/170389
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Stack from ghstack (oldest at bottom):
(This PR will be rebased on #166174) (There are other PR which updates NCCL version: #168091)
We did the following thing:
Resolves #167682