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Optimize code format, instruction order and flag usage in RV64 Montgomery multiplication (RISC-V) - #29438
Optimize code format, instruction order and flag usage in RV64 Montgomery multiplication (RISC-V)#29438fengpengboa wants to merge 2 commits into
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Hi @t8m @paulidale @nhorman @ZenithalHourlyRate @HeliC829 @JerryShih !! My submitted PR is currently in Open status. When convenient, could the maintainer team please help move the review forward? I'm happy to address any needed changes or provide clarifications.Thank you for your time and consideration! |
nhorman
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Theres nothing to egregious in here, but it seems like there are a few alignment issues. I'm not sure if this applies here, but are you running clang-format on this perl script? If so, we explicitly exclude any non-c files from formatting, specifically because clang-format isn't meant to format perl.
| $ret.=" sd $_,$stack_offset(sp)\n"; | ||
| } | ||
| return $ret; | ||
| return $ret; |
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this doesn't seem properly aligned
| $ret.=" ld $_,$stack_offset(sp)\n"; | ||
| } | ||
| $ret.=" addi sp,sp,$stack_reservation\n"; | ||
| $ret.=" addi sp,sp,$stack_reservation\n"; |
Thank you for catching this. I'll correct the formatting issues manually. |
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…plement Montgomery multiplication assembly optimization for RV64GC" (openssl#28012). The key improvements include:code formatting unification、instruction scheduling optimization、register allocation strategy update、updates to addition/subtraction carry and borrow flag handling. These enhancements aim to improve both the code maintainability and its execution performance, particularly on out-of-order RISC-V cores.
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Hello @nhorman! I have now addressed all your previous review comments. The latest changes have been pushed. |
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Hi @paulidale , could you please review this PR when you have a moment? Thank you! |
…ged "Implement Montgomery multiplication assembly optimization for RV64GC" (openssl#28012). The key improvements include:code formatting unification、instruction scheduling optimization、register allocation strategy update、updates to addition/subtraction carry and borrow flag handling. These enhancements aim to improve both the code maintainability and its execution performance, particularly on out-of-order RISC-V cores.
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No need for a timer reset. |
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@nhorman Hi,I've added the missing newline using a fixup commit. The PR has been updated and is ready for your final review when you have a moment. |
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24 hours has passed since 'approval: done' was set, but as this PR has been updated in that time the label 'approval: ready to merge' is not being automatically set. Please review the updates and set the label manually. |
Hi ,@nhorman @paulidale, The PR was updated after receiving approval: done, so the automatic label wasn’t applied.Since I don’t have the required permissions, could someone with access please add the approval: ready to merge label?Appreciate your help. |
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merged to master, thank you |
…plement Montgomery multiplication assembly optimization for RV64GC" (#28012). The key improvements include:code formatting unification、instruction scheduling optimization、register allocation strategy update、updates to addition/subtraction carry and borrow flag handling. These enhancements aim to improve both the code maintainability and its execution performance, particularly on out-of-order RISC-V cores. Reviewed-by: Neil Horman <[email protected]> Reviewed-by: Paul Dale <[email protected]> (Merged from #29438)
This PR performs further optimization based on the already merged "Implement Montgomery multiplication assembly optimization for RV64GC" (#28012).
The key improvements include:code formatting unification、instruction scheduling optimization、register allocation strategy update、updates to addition/subtraction carry and borrow flag handling.
These enhancements aim to improve both the code maintainability and its execution performance, particularly on out-of-order RISC-V cores.
Performance Improvement
benchmark results run on SG2042: