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Optimize code format, instruction order and flag usage in RV64 Montgomery multiplication (RISC-V) - #29438

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fengpengboa wants to merge 2 commits into
openssl:masterfrom
fengpengboa:en_rv64-mont-asm
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fengpengboa wants to merge 2 commits into
openssl:masterfrom
fengpengboa:en_rv64-mont-asm

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This PR performs further optimization based on the already merged "Implement Montgomery multiplication assembly optimization for RV64GC" (#28012).
The key improvements include:code formatting unification、instruction scheduling optimization、register allocation strategy update、updates to addition/subtraction carry and borrow flag handling.
These enhancements aim to improve both the code maintainability and its execution performance, particularly on out-of-order RISC-V cores.

Performance Improvement

openssl speed  -seconds 1 rsa2048

benchmark results run on SG2042:

Test Item Baseline (C) ASM Optimized Improvement
​sign/s 208 213.0 2.4%
​verify/s 7190 7415.2 3.13%
encr./s 6638 6814.1 2.65%
decr./s 203 209.0 2.96%

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Hi @t8m @paulidale @nhorman @ZenithalHourlyRate @HeliC829 @JerryShih !! My submitted PR is currently in Open status. When convenient, could the maintainer team please help move the review forward? I'm happy to address any needed changes or provide clarifications.Thank you for your time and consideration!

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Theres nothing to egregious in here, but it seems like there are a few alignment issues. I'm not sure if this applies here, but are you running clang-format on this perl script? If so, we explicitly exclude any non-c files from formatting, specifically because clang-format isn't meant to format perl.

Comment thread crypto/bn/asm/riscv64-mont.pl Outdated
$ret.=" sd $_,$stack_offset(sp)\n";
}
return $ret;
return $ret;

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this doesn't seem properly aligned

Comment thread crypto/bn/asm/riscv64-mont.pl Outdated
$ret.=" ld $_,$stack_offset(sp)\n";
}
$ret.=" addi sp,sp,$stack_reservation\n";
$ret.=" addi sp,sp,$stack_reservation\n";

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nor does this.

@fengpengboa

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Theres nothing to egregious in here, but it seems like there are a few alignment issues. I'm not sure if this applies here, but are you running clang-format on this perl script? If so, we explicitly exclude any non-c files from formatting, specifically because clang-format isn't meant to format perl.

Thank you for catching this. I'll correct the formatting issues manually.

…plement Montgomery multiplication assembly optimization for RV64GC" (openssl#28012).

The key improvements include:code formatting unification、instruction scheduling optimization、register allocation strategy update、updates to addition/subtraction carry and borrow flag handling.
These enhancements aim to improve both the code maintainability and its execution performance, particularly on out-of-order RISC-V cores.
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Theres nothing to egregious in here, but it seems like there are a few alignment issues. I'm not sure if this applies here, but are you running clang-format on this perl script? If so, we explicitly exclude any non-c files from formatting, specifically because clang-format isn't meant to format perl.

Hello @nhorman! I have now addressed all your previous review comments. The latest changes have been pushed.

nhorman
nhorman previously approved these changes Dec 19, 2025
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Hi @paulidale , could you please review this PR when you have a moment? Thank you!

@ZenithalHourlyRate ZenithalHourlyRate left a comment

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LGTM!

paulidale
paulidale previously approved these changes Dec 21, 2025
Comment thread crypto/bn/asm/riscv64-mont.pl Resolved
@paulidale paulidale added approval: done This pull request has the required number of approvals branch: master Applies to master branch tests: exempted The PR is exempt from requirements for testing triaged: performance The issue/pr reports/fixes a performance concern labels Dec 21, 2025
@paulidale paulidale changed the title Optimize code format, instruction order and flag usage in RV64 Montgomery multiplication Optimize code format, instruction order and flag usage in RV64 Montgomery multiplication (RISC-V) Dec 21, 2025
…ged "Implement Montgomery multiplication assembly optimization for RV64GC" (openssl#28012). The key improvements include:code formatting unification、instruction scheduling optimization、register allocation strategy update、updates to addition/subtraction carry and borrow flag handling. These enhancements aim to improve both the code maintainability and its execution performance, particularly on out-of-order RISC-V cores.
@fengpengboa
fengpengboa dismissed stale reviews from paulidale and nhorman via 169e4d0 December 22, 2025 02:58
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No need for a timer reset.

@paulidale
paulidale requested a review from nhorman December 22, 2025 03:02
@fengpengboa

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@nhorman Hi,I've added the missing newline using a fixup commit. The PR has been updated and is ready for your final review when you have a moment.

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LGTM.

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24 hours has passed since 'approval: done' was set, but as this PR has been updated in that time the label 'approval: ready to merge' is not being automatically set. Please review the updates and set the label manually.

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24 hours has passed since 'approval: done' was set, but as this PR has been updated in that time the label 'approval: ready to merge' is not being automatically set. Please review the updates and set the label manually.

Hi ,@nhorman @paulidale, The PR was updated after receiving approval: done, so the automatic label wasn’t applied.Since I don’t have the required permissions, could someone with access please add the approval: ready to merge label?Appreciate your help.

@nhorman nhorman removed the approval: done This pull request has the required number of approvals label Dec 30, 2025
@nhorman nhorman added the approval: ready to merge The 24 hour grace period has passed, ready to merge label Dec 30, 2025
@nhorman

nhorman commented Dec 30, 2025

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merged to master, thank you

@nhorman nhorman closed this Dec 30, 2025
openssl-machine pushed a commit that referenced this pull request Dec 30, 2025
…plement Montgomery multiplication assembly optimization for RV64GC" (#28012).

The key improvements include:code formatting unification、instruction scheduling optimization、register allocation strategy update、updates to addition/subtraction carry and borrow flag handling.
These enhancements aim to improve both the code maintainability and its execution performance, particularly on out-of-order RISC-V cores.

Reviewed-by: Neil Horman <[email protected]>
Reviewed-by: Paul Dale <[email protected]>
(Merged from #29438)
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6 participants