* Fix illegal instruction error on CPUs without SSE4.2 support

This fixes issue #989 where oj 3.16.13 crashes with "Illegal instruction"
on CPUs that don't support SSE4.2.

The problem was that enabling -msse4.2 at compile time based on compiler
support caused prebuilt gems to include SSE4.2 instructions even when the
target CPU doesn't support them.

Solution:
- Use runtime CPU detection to select the appropriate SIMD implementation
- Detection happens once during library initialization (no per-parse overhead)
- Cross-platform support: GCC/Clang (__builtin_cpu_supports) and MSVC (__cpuid)
- Function-level target attributes enable SIMD code without global flags
- Portable macros (OJ_PREFETCH, OJ_CTZ, OJ_UNLIKELY) for cross-compiler support

This is similar to the approach used by ruby/json for SIMD detection.

Fixes #989

Co-Authored-By: Claude Opus 4.5 <[email protected]>

* Fix clang-format style violations

Co-Authored-By: Claude Opus 4.5 <[email protected]>

* Address review feedback: remove __builtin_cpu_init(), add cpuid.h include

- Remove unnecessary __builtin_cpu_init() call since we're not using IFUNCs
- Add #include <cpuid.h> with __has_include guard for __get_cpuid fallback

Co-Authored-By: Claude Opus 4.5 <[email protected]>

---------

Co-authored-by: Claude Opus 4.5 <[email protected]>

* Refactored and simplified the ARM Neon implementation. This optimizes the worst case synthetic benchmarks.

* Move the definition of FORCE_INLINE out of the HAVE_SIMD_NEON block.

* Formatting.

* Renamed the expected real-world test data files.

* Initial optimization of oj_dump_cstr using SSE4.2 on x86-64 platforms.

* Refactor the code to reduce duplication.

* SSE42 bugfixes.

* Formatting.

* Added SIMD_MINIMUM_THRESHOLD after accidentally removing it when merging the develop branch.

* More fixes after merging develop into this branch.

* clang-format

* Refactor oj_dump_cstr to use runtime SIMD detection of SSE4.

* Wrap SSE4.2 initialization code in an ifdef.

* formatting