Naive question from someone with no POWER knowledge: if before the callee-saved registers we would use were 1-14, and now we are also using register 0, why are you moving to 0-13 instead of 0-14? What became of fp register 14?

Naive question from someone with no POWER knowledge: if before the callee-saved registers we would use were 1-14, and now we are also using register 0, why are you moving to 0-13 instead of 0-14?

You don't need POWER knowledge here; just keep in mind the caller/callee save distinction.

FPR 0-13 are callER save, meaning that the C code of the GC will trash them, hence caml_call_gc must save and restore them.

FPR 14-31 are callEE save, meaning that C code will preserve them, hence caml_call_gc doesn't need to save and restore them.

What became of fp register 14?

It is callEE-save, hence preserved by C code, hence there is no need to save and restore it in caml_call_gc. (But it was causing no harm either.)

why are you moving to 0-13 instead of 0-14?

You don't need POWER knowledge to

I can confirm that this PR combined with #12540 fixes the reported issue.
I also merged in #12545 to compile qcheck-core and complete a full multicoretests run succesfully.

Finally FWIW, the code change LGTM from the above description.