Read AA64ISAR0_EL1 to check dot product support#16082
Merged
Merged
Conversation
added 3 commits
May 4, 2023 10:30
Reads the ARM AA64ISAR0_EL1 register to figure out the availability of DOT instruction support on the hardware.
chenfucn
approved these changes
May 24, 2023
Contributor
|
/azp run Linux CPU CI Pipeline, Linux CPU Minimal Build E2E CI Pipeline, Linux GPU CI Pipeline, Linux GPU TensorRT CI Pipeline, Linux OpenVINO CI Pipeline, Linux QNN CI Pipeline, MacOS CI Pipeline |
|
Azure Pipelines successfully started running 7 pipeline(s). |
Contributor
|
/azp run ONNX Runtime Web CI Pipeline, Windows ARM64 QNN CI Pipeline, Windows CPU CI Pipeline, Windows GPU CI Pipeline, Windows GPU TensorRT CI Pipeline, onnxruntime-binary-size-checks-ci-pipeline, orttraining-linux-ci-pipeline, orttraining-linux-gpu-ci-pipeline, orttraining-ortmodule-distributed |
|
Azure Pipelines successfully started running 9 pipeline(s). |
ghost
mentioned this pull request
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
2 participants
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
Description
Use an assembly instruction to read the
AA64ISAR0_EL1register for dotproduct support.
Motivation and Context
The only reliable way to check for supported instruction extensions in ARM is to
query the instruction set attribute registers. Dot product instructions can
be checked using bits 47:44 in the AA64ISAR0_EL1
register.
On
qemu-aarch64with thea64fxcpu which does not support the dot productinstructions, running a quantized BERT-Large (from MLPerf) results in
SIGILL.With the change, the program continues without using the dot product
instructions. Also verified that
S8S8_SDOTkernels are invoked when runningon hardware that supports dot product instructions.