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| 1 | +.. _mimxrt_general: |
| 2 | + |
| 3 | +General information about the MIMXRT port |
| 4 | +========================================= |
| 5 | + |
| 6 | +The i.MXRT MCU family is a high performance family of devices made by NXP. |
| 7 | +Based on an ARM7 core, they provide many on-chip I/O units for building |
| 8 | +small to medium sized devices. |
| 9 | + |
| 10 | +Multitude of boards |
| 11 | +------------------- |
| 12 | + |
| 13 | +There is a multitude of modules and boards from different sources which carry |
| 14 | +an i.MXRT chip. MicroPython aims to provide a generic port which runs on |
| 15 | +as many boards/modules as possible, but there may be limitations. The |
| 16 | +NXP IMXRT1020-EVK and the Teensy 4.0 and Teensy 4.1 development boards are taken |
| 17 | +as reference for the port (for example, testing is performed on them). |
| 18 | +For any board you are using please make sure you have a data sheet, schematics |
| 19 | +and other reference materials so you can look up any board-specific functions. |
| 20 | + |
| 21 | +The following boards are supported by the port: |
| 22 | + |
| 23 | +- MIMXRT1010-EVK |
| 24 | +- MIMXRT1020-EVK |
| 25 | +- MIMXRT1050-EVK |
| 26 | +- MIMXRT1060-EVK |
| 27 | +- MIMXRT1064-EVK |
| 28 | +- Teensy 4.0 |
| 29 | +- Teensy 4.1 |
| 30 | + |
| 31 | +Supported MCUs |
| 32 | +-------------- |
| 33 | + |
| 34 | ++-------------+--------------------+-------------------------+ |
| 35 | +| Product | CPU | Memory | |
| 36 | ++=============+====================+=========================+ |
| 37 | +| i.MX RT1064 | Cortex-M7 @600 MHz | 1 MB SRAM, 4 MB Flash | |
| 38 | ++-------------+--------------------+-------------------------+ |
| 39 | +| i.MX RT1061 | Cortex-M7 @600 MHz | 1 MB SRAM | |
| 40 | ++-------------+--------------------+-------------------------+ |
| 41 | +| i.MX RT1062 | Cortex-M7 @600 MHz | 1 MB SRAM | |
| 42 | ++-------------+--------------------+-------------------------+ |
| 43 | +| i.MX RT1050 | Cortex-M7 @600 MHz | 512 kB SRAM | |
| 44 | ++-------------+--------------------+-------------------------+ |
| 45 | +| i.MX RT1020 | Cortex-M7 @500 MHz | 256 kB SRAM | |
| 46 | ++-------------+--------------------+-------------------------+ |
| 47 | +| i.MX RT1010 | Cortex-M7 @500 MHz | 128 kB SRAM | |
| 48 | ++-------------+--------------------+-------------------------+ |
| 49 | + |
| 50 | +Note: Most of the controllers do not have internal flash memory. Therefore |
| 51 | +their flash capacity is dependent on an external flash chip. |
| 52 | + |
| 53 | +To make a generic MIMXRT port and support as many boards as possible the |
| 54 | +following design and implementation decision were made: |
| 55 | + |
| 56 | +* GPIO pin numbering is based on the board numbering as well as on the |
| 57 | + MCU numbering. Please have the manual/pin diagram of your board at hand |
| 58 | + to find correspondence between your board pins and actual i.MXRT pins. |
| 59 | +* All MCU pins are supported by MicroPython but not all are usable on any given board. |
| 60 | + |
| 61 | +Technical specifications and SoC datasheets |
| 62 | +------------------------------------------- |
| 63 | + |
| 64 | +The data sheets and other reference material for i.MXRT chip are available |
| 65 | +from the vendor site: https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/i-mx-rt-crossover-mcus:IMX-RT-SERIES . |
| 66 | +They are the primary reference for the chip technical specifications, capabilities, |
| 67 | +operating modes, internal functioning, etc. |
| 68 | + |
| 69 | +For your convenience, a few technical specifications are provided below: |
| 70 | + |
| 71 | +* Architecture: ARM Cortex M7 |
| 72 | +* CPU frequency: up to 600MHz |
| 73 | +* Total RAM available: up to 1 MByte (see table) |
| 74 | +* BootROM: 96KB |
| 75 | +* External FlashROM: code and data, via SPI Flash; usual size 2 - 8 MB |
| 76 | + Some boards provide additional external RAM and SPI flash. |
| 77 | +* GPIO: up to 124 (GPIOs are multiplexed with other functions, including |
| 78 | + external FlashROM, UART, etc.) |
| 79 | +* UART: 4 or 8 RX/TX UART. Hardware handshaking is supported by the MCU, |
| 80 | + but the boards used for testing do not expose the signals. |
| 81 | +* SPI: 2 or 4 low power SPI interfaces (software implementation available on every pin) |
| 82 | +* I2C: 2 or 4 low power I2C interfaces (software implementation available on every pin) |
| 83 | +* I2S: 3 I2S interfaces |
| 84 | +* ADC: one or two 12-bit SAR ADC converters |
| 85 | +* Ethernet controller |
| 86 | +* Programming: using BootROM bootloader from USB - due to external FlashROM |
| 87 | + and always-available BootROM bootloader, the MIMXRT is not brickable |
| 88 | + |
| 89 | +The lower numbers for UART, SPI and I2C apply to the i.MXRT 101x MCU. |
| 90 | + |
| 91 | +For more information see the i.MXRT data sheets or reference manuals. |
| 92 | +NXP provides software support through it's SDK packages. |
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