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@merledu

Micro Electronics Research Laboratory

A non-profit organization fostering research on IoT, AI, and ML-based architectures leveraging the open-source RISC-V ISA.

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  1. OpenTCAM OpenTCAM Public

    An open-source Ternary Content Addressable Memory (TCAM) compiler.

    Python 33 14

  2. azadi-soc azadi-soc Public

    Azadi (Freedom) is a 32-bit RISC-V CPU based System on Chip.

    SystemVerilog 32 10

  3. Google-Summer-of-Code Google-Summer-of-Code Public

    Project ideas list for Google Summer of Code.

    18 2

  4. Ibtida Ibtida Public

    A basic System on a Chip (SoC) based on the Buraq core for the Internet of Things (IoT).

    Verilog 6 2

  5. TileLink TileLink Public

    TileLink Uncached Lightweight (TL-UL) implementation on Chisel.

    Scala 22 11

  6. buraq_mini buraq_mini Public

    This repository contains the 5 stage pipelined CPU implemented on the RISC-V ISA and Chisel hardware construction language (HDL)

    Scala 11 6

Repositories

Showing 10 of 155 repositories
  • renode-nucleusrv Public
    merledu/renode-nucleusrv’s past year of commit activity
    Shell 0 0 0 0 Updated Jan 14, 2026
  • Athestia Public

    Clean slate application using NDN with Dilithium to enhance security in future internet technology

    merledu/Athestia’s past year of commit activity
    SystemVerilog 3 0 0 0 Updated Jan 13, 2026
  • oxygen Public

    A RISC-V Simulator

    merledu/oxygen’s past year of commit activity
    Python 7 GPL-3.0 3 0 0 Updated Jan 13, 2026
  • ai4org Public

    Hallucination reduction framework for LLMs using RAG, multi-discriminator RL, and automated data pipelines.

    merledu/ai4org’s past year of commit activity
    Python 1 4 40 (7 issues need help) 0 Updated Jan 12, 2026
  • rv-sparse Public

    Open-source RISC-V Vector accelerated sparse linear algebra library.

    merledu/rv-sparse’s past year of commit activity
    0 GPL-3.0 0 0 0 Updated Jan 12, 2026
  • coco-rvtb Public

    Generic testbench for RISC-V CPUs

    merledu/coco-rvtb’s past year of commit activity
    Python 8 BSD-3-Clause 8 0 0 Updated Dec 13, 2025
  • nucleusrv Public

    NucleusRV (rv32-imf) - A 32-bit 5 staged pipelined risc-v core.

    merledu/nucleusrv’s past year of commit activity
    Assembly 76 GPL-3.0 35 13 2 Updated Nov 18, 2025
  • Burq-Suite Public

    An All in one RISC-V Suite.

    merledu/Burq-Suite’s past year of commit activity
    JavaScript 5 3 0 0 Updated Oct 10, 2025
  • XSoC-Lite Public

    Modular eXtensible SoC (RV32IMCF + BabyKyber accelerator)

    merledu/XSoC-Lite’s past year of commit activity
    C++ 0 0 0 0 Updated Oct 8, 2025
  • vaquita Public
    merledu/vaquita’s past year of commit activity
    Scala 18 GPL-3.0 5 0 1 Updated Oct 6, 2025
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