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Auto merge of rust-lang#125732 - matthiaskrgr:rollup-bozbtk3, r=matthiaskrgr
Rollup of 7 pull requests Successful merges: - rust-lang#124655 (Add `-Zfixed-x18`) - rust-lang#125693 (Format all source files in `tests/coverage/`) - rust-lang#125700 (coverage: Avoid overflow when the MC/DC condition limit is exceeded) - rust-lang#125705 (Reintroduce name resolution check for trying to access locals from an inline const) - rust-lang#125708 (tier 3 target policy: clarify the point about producing assembly) - rust-lang#125715 (remove unneeded extern crate in rmake test) - rust-lang#125719 (Extract coverage-specific code out of `compiletest::runtest`) r? `@ghost` `@rustbot` modify labels: rollup
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‎compiler/rustc_codegen_llvm/messages.ftl

+2
Original file line numberDiff line numberDiff line change
@@ -18,6 +18,8 @@ codegen_llvm_error_creating_import_library =
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codegen_llvm_error_writing_def_file =
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Error writing .DEF file: {$error}
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codegen_llvm_fixed_x18_invalid_arch = the `-Zfixed-x18` flag is not supported on the `{$arch}` architecture
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codegen_llvm_from_llvm_diag = {$message}
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codegen_llvm_from_llvm_optimization_diag = {$filename}:{$line}:{$column} {$pass_name} ({$kind}): {$message}

‎compiler/rustc_codegen_llvm/src/errors.rs

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Original file line numberDiff line numberDiff line change
@@ -254,3 +254,9 @@ pub struct MismatchedDataLayout<'a> {
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pub(crate) struct InvalidTargetFeaturePrefix<'a> {
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pub feature: &'a str,
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}
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#[derive(Diagnostic)]
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#[diag(codegen_llvm_fixed_x18_invalid_arch)]
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pub(crate) struct FixedX18InvalidArch<'a> {
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pub arch: &'a str,
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}

‎compiler/rustc_codegen_llvm/src/llvm_util.rs

+10-1
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@@ -1,6 +1,6 @@
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use crate::back::write::create_informational_target_machine;
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use crate::errors::{
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InvalidTargetFeaturePrefix, PossibleFeature, TargetFeatureDisableOrEnable,
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FixedX18InvalidArch, InvalidTargetFeaturePrefix, PossibleFeature, TargetFeatureDisableOrEnable,
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UnknownCTargetFeature, UnknownCTargetFeaturePrefix, UnstableCTargetFeature,
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};
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use crate::llvm;
@@ -615,6 +615,15 @@ pub(crate) fn global_llvm_features(sess: &Session, diagnostics: bool) -> Vec<Str
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.flatten();
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features.extend(feats);
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// -Zfixed-x18
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if sess.opts.unstable_opts.fixed_x18 {
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if sess.target.arch != "aarch64" {
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sess.dcx().emit_fatal(FixedX18InvalidArch { arch: &sess.target.arch });
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} else {
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features.push("+reserve-x18".into());
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}
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}
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if diagnostics && let Some(f) = check_tied_features(sess, &featsmap) {
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sess.dcx().emit_err(TargetFeatureDisableOrEnable {
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features: f,

‎compiler/rustc_interface/src/tests.rs

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@@ -773,6 +773,7 @@ fn test_unstable_options_tracking_hash() {
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tracked!(emit_thin_lto, false);
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tracked!(export_executable_symbols, true);
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tracked!(fewer_names, Some(true));
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tracked!(fixed_x18, true);
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tracked!(flatten_format_args, false);
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tracked!(force_unstable_if_unmarked, true);
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tracked!(fuel, Some(("abc".to_string(), 99)));

‎compiler/rustc_mir_build/src/build/coverageinfo/mcdc.rs

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@@ -217,12 +217,13 @@ impl MCDCInfoBuilder {
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}
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_ => {
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// Do not generate mcdc mappings and statements for decisions with too many conditions.
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let rebase_idx = self.branch_spans.len() - decision.conditions_num + 1;
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// Therefore, first erase the condition info of the (N-1) previous branch spans.
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let rebase_idx = self.branch_spans.len() - (decision.conditions_num - 1);
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for branch in &mut self.branch_spans[rebase_idx..] {
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branch.condition_info = None;
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}
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// ConditionInfo of this branch shall also be reset.
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// Then, erase this last branch span's info too, for a total of N.
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condition_info = None;
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tcx.dcx().emit_warn(MCDCExceedsConditionNumLimit {

‎compiler/rustc_resolve/src/late.rs

+5
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@@ -4505,6 +4505,11 @@ impl<'a: 'ast, 'b, 'ast, 'tcx> LateResolutionVisitor<'a, 'b, 'ast, 'tcx> {
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self.visit_expr(elem);
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self.resolve_anon_const(ct, AnonConstKind::ConstArg(IsRepeatExpr::Yes));
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}
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ExprKind::ConstBlock(ref expr) => {
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self.resolve_anon_const_manual(false, AnonConstKind::InlineConst, |this| {
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this.visit_expr(expr)
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});
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}
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ExprKind::Index(ref elem, ref idx, _) => {
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self.resolve_expr(elem, Some(expr));
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self.visit_expr(idx);

‎compiler/rustc_session/src/options.rs

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@@ -1678,6 +1678,8 @@ options! {
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fewer_names: Option<bool> = (None, parse_opt_bool, [TRACKED],
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"reduce memory use by retaining fewer names within compilation artifacts (LLVM-IR) \
16801680
(default: no)"),
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fixed_x18: bool = (false, parse_bool, [TRACKED],
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"make the x18 register reserved on AArch64 (default: no)"),
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flatten_format_args: bool = (true, parse_bool, [TRACKED],
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"flatten nested format_args!() and literals into a simplified format_args!() call \
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(default: yes)"),

‎src/doc/rustc/src/target-tier-policy.md

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@@ -247,7 +247,8 @@ approved by the appropriate team for that shared code before acceptance.
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target may not have; use conditional compilation or runtime detection, as
248248
appropriate, to let each target run code supported by that target.
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- Tier 3 targets must be able to produce assembly using at least one of
250-
rustc's supported backends from any host target.
250+
rustc's supported backends from any host target. (Having support in a fork
251+
of the backend is not sufficient, it must be upstream.)
251252

252253
If a tier 3 target stops meeting these requirements, or the target maintainers
253254
no longer have interest or time, or the target shows no signs of activity and

‎src/doc/unstable-book/src/compiler-flags/fixed-x18.md

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@@ -0,0 +1,32 @@
1+
# `fixed-x18`
2+
3+
This option prevents the compiler from using the x18 register. It is only
4+
supported on aarch64.
5+
6+
From the [ABI spec][arm-abi]:
7+
8+
> X18 is the platform register and is reserved for the use of platform ABIs.
9+
> This is an additional temporary register on platforms that don't assign a
10+
> special meaning to it.
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12+
This flag only has an effect when the x18 register would otherwise be considered
13+
a temporary register. When the flag is applied, x18 is always a reserved
14+
register.
15+
16+
This flag is intended for use with the shadow call stack sanitizer. Generally,
17+
when that sanitizer is enabled, the x18 register is used to store a pointer to
18+
the shadow stack. Enabling this flag prevents the compiler from overwriting the
19+
shadow stack pointer with temporary data, which is necessary for the sanitizer
20+
to work correctly.
21+
22+
Currently, the `-Zsanitizer=shadow-call-stack` flag is only supported on
23+
platforms that always treat x18 as a reserved register, and the `-Zfixed-x18`
24+
flag is not required to use the sanitizer on such platforms. However, the
25+
sanitizer may be supported on targets where this is not the case in the future.
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27+
It is undefined behavior for `-Zsanitizer=shadow-call-stack` code to call into
28+
code where x18 is a temporary register. On the other hand, when you are *not*
29+
using the shadow call stack sanitizer, compilation units compiled with and
30+
without the `-Zfixed-x18` flag are compatible with each other.
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32+
[arm-abi]: https://developer.arm.com/documentation/den0024/a/The-ABI-for-ARM-64-bit-Architecture/Register-use-in-the-AArch64-Procedure-Call-Standard/Parameters-in-general-purpose-registers

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