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steffahndtolnay
steffahn
authored and
dtolnay
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Fix a bunch of typos
1 parent a389fee commit 0716b22

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20 files changed

+47
-47
lines changed

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+47
-47
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‎ci/docker/x86_64-linux-android/Dockerfile

+1-1
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,7 @@ COPY android-install-ndk.sh /android/
1717
RUN sh /android/android-install-ndk.sh $ANDROID_ARCH
1818

1919
# We do not run x86_64-linux-android tests on an android emulator.
20-
# See ci/android-sysimage.sh for informations about how tests are run.
20+
# See ci/android-sysimage.sh for information about how tests are run.
2121
COPY android-sysimage.sh /android/
2222
RUN bash /android/android-sysimage.sh x86_64 x86_64-24_r07.zip
2323

‎crates/core_arch/src/aarch64/prefetch.rs

+1-1
Original file line numberDiff line numberDiff line change
@@ -66,7 +66,7 @@ pub const _PREFETCH_LOCALITY3: i32 = 3;
6666
#[rustc_legacy_const_generics(1, 2)]
6767
// FIXME: Replace this with the standard ACLE __pld/__pldx/__pli/__plix intrinsics
6868
pub unsafe fn _prefetch<const RW: i32, const LOCALITY: i32>(p: *const i8) {
69-
// We use the `llvm.prefetch` instrinsic with `cache type` = 1 (data cache).
69+
// We use the `llvm.prefetch` intrinsic with `cache type` = 1 (data cache).
7070
static_assert_imm1!(RW);
7171
static_assert_imm2!(LOCALITY);
7272
prefetch(p, RW, LOCALITY, 1);

‎crates/core_arch/src/arm/mod.rs

+1-1
Original file line numberDiff line numberDiff line change
@@ -93,7 +93,7 @@ pub unsafe fn udf() -> ! {
9393
/// This provides a hint to debugging and related systems. The argument must be
9494
/// a constant integer from 0 to 15 inclusive. See implementation documentation
9595
/// for the effect (if any) of this instruction and the meaning of the
96-
/// argument. This is available only when compliling for AArch32.
96+
/// argument. This is available only when compiling for AArch32.
9797
// Section 10.1 of ACLE says that the supported arches are: 7, 7-M
9898
// "The DBG hint instruction is added in ARMv7. It is UNDEFINED in the ARMv6 base architecture, and
9999
// executes as a NOP instruction in ARMv6K and ARMv6T2." - ARM Architecture Reference Manual ARMv7-A

‎crates/core_arch/src/arm_shared/barrier/v8.rs

+1-1
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@ pub struct NSHLD;
1616

1717
dmb_dsb!(NSHLD);
1818

19-
/// Outher Shareable is the required shareability domain, reads are the required
19+
/// Outer Shareable is the required shareability domain, reads are the required
2020
/// access type
2121
pub struct OSHLD;
2222

‎crates/core_arch/src/wasm32/atomic.rs

+2-2
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@ extern "C" {
1616
/// pointed to by `ptr` is equal to `expression` (performing this action
1717
/// atomically).
1818
///
19-
/// The argument `timeout_ns` is a maxinum number of nanoseconds the calling
19+
/// The argument `timeout_ns` is a maximum number of nanoseconds the calling
2020
/// thread will be blocked for, if it blocks. If the timeout is negative then
2121
/// the calling thread will be blocked forever.
2222
///
@@ -46,7 +46,7 @@ pub unsafe fn memory_atomic_wait32(ptr: *mut i32, expression: i32, timeout_ns: i
4646
/// pointed to by `ptr` is equal to `expression` (performing this action
4747
/// atomically).
4848
///
49-
/// The argument `timeout_ns` is a maxinum number of nanoseconds the calling
49+
/// The argument `timeout_ns` is a maximum number of nanoseconds the calling
5050
/// thread will be blocked for, if it blocks. If the timeout is negative then
5151
/// the calling thread will be blocked forever.
5252
///

‎crates/core_arch/src/wasm32/simd128.rs

+5-5
Original file line numberDiff line numberDiff line change
@@ -33,7 +33,7 @@ types! {
3333
/// * four 32-bit floats (`f32`)
3434
/// * two 64-bit floats (`f64`)
3535
///
36-
/// The `v128` type in Rust is intended to be quite analagous to the `v128`
36+
/// The `v128` type in Rust is intended to be quite analogous to the `v128`
3737
/// type in WebAssembly. Operations on `v128` can only be performed with the
3838
/// functions in this module.
3939
// N.B., internals here are arbitrary.
@@ -2305,7 +2305,7 @@ pub fn i8x16_abs(a: v128) -> v128 {
23052305
}
23062306
}
23072307

2308-
/// Negates a 128-bit vectors intepreted as sixteen 8-bit signed integers
2308+
/// Negates a 128-bit vectors interpreted as sixteen 8-bit signed integers
23092309
#[inline]
23102310
#[cfg_attr(test, assert_instr(i8x16.neg))]
23112311
#[target_feature(enable = "simd128")]
@@ -2602,7 +2602,7 @@ pub fn i16x8_abs(a: v128) -> v128 {
26022602
}
26032603
}
26042604

2605-
/// Negates a 128-bit vectors intepreted as eight 16-bit signed integers
2605+
/// Negates a 128-bit vectors interpreted as eight 16-bit signed integers
26062606
#[inline]
26072607
#[cfg_attr(test, assert_instr(i16x8.neg))]
26082608
#[target_feature(enable = "simd128")]
@@ -3090,7 +3090,7 @@ pub fn i32x4_abs(a: v128) -> v128 {
30903090
}
30913091
}
30923092

3093-
/// Negates a 128-bit vectors intepreted as four 32-bit signed integers
3093+
/// Negates a 128-bit vectors interpreted as four 32-bit signed integers
30943094
#[inline]
30953095
#[cfg_attr(test, assert_instr(i32x4.neg))]
30963096
#[target_feature(enable = "simd128")]
@@ -3472,7 +3472,7 @@ pub fn i64x2_abs(a: v128) -> v128 {
34723472
}
34733473
}
34743474

3475-
/// Negates a 128-bit vectors intepreted as two 64-bit signed integers
3475+
/// Negates a 128-bit vectors interpreted as two 64-bit signed integers
34763476
#[inline]
34773477
#[cfg_attr(test, assert_instr(i64x2.neg))]
34783478
#[target_feature(enable = "simd128")]

‎crates/core_arch/src/x86/avx.rs

+2-2
Original file line numberDiff line numberDiff line change
@@ -53,7 +53,7 @@ pub unsafe fn _mm256_add_ps(a: __m256, b: __m256) -> __m256 {
5353
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_and_pd)
5454
#[inline]
5555
#[target_feature(enable = "avx")]
56-
// FIXME: Should be 'vandpd' instuction.
56+
// FIXME: Should be 'vandpd' instruction.
5757
// See https://github.com/rust-lang/stdarch/issues/71
5858
#[cfg_attr(test, assert_instr(vandps))]
5959
#[stable(feature = "simd_x86", since = "1.27.0")]
@@ -83,7 +83,7 @@ pub unsafe fn _mm256_and_ps(a: __m256, b: __m256) -> __m256 {
8383
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_or_pd)
8484
#[inline]
8585
#[target_feature(enable = "avx")]
86-
// FIXME: should be `vorpd` instuction.
86+
// FIXME: should be `vorpd` instruction.
8787
// See <https://github.com/rust-lang/stdarch/issues/71>.
8888
#[cfg_attr(test, assert_instr(vorps))]
8989
#[stable(feature = "simd_x86", since = "1.27.0")]

‎crates/core_arch/src/x86/avx512f.rs

+8-8
Original file line numberDiff line numberDiff line change
@@ -19479,7 +19479,7 @@ pub unsafe fn _mm_maskz_permute_pd<const IMM2: i32>(k: __mmask8, a: __m128d) ->
1947919479
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_permutex_epi64&expand=4208)
1948019480
#[inline]
1948119481
#[target_feature(enable = "avx512f")]
19482-
#[cfg_attr(test, assert_instr(vperm, MASK = 0b10_01_10_11))] //shoud be vpermq
19482+
#[cfg_attr(test, assert_instr(vperm, MASK = 0b10_01_10_11))] //should be vpermq
1948319483
#[rustc_legacy_const_generics(1)]
1948419484
pub unsafe fn _mm512_permutex_epi64<const MASK: i32>(a: __m512i) -> __m512i {
1948519485
static_assert_imm8!(MASK);
@@ -19535,7 +19535,7 @@ pub unsafe fn _mm512_maskz_permutex_epi64<const MASK: i32>(k: __mmask8, a: __m51
1953519535
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_permutex_epi64&expand=4205)
1953619536
#[inline]
1953719537
#[target_feature(enable = "avx512f,avx512vl")]
19538-
#[cfg_attr(test, assert_instr(vperm, MASK = 0b10_01_10_11))] //shoud be vpermq
19538+
#[cfg_attr(test, assert_instr(vperm, MASK = 0b10_01_10_11))] //should be vpermq
1953919539
#[rustc_legacy_const_generics(1)]
1954019540
pub unsafe fn _mm256_permutex_epi64<const MASK: i32>(a: __m256i) -> __m256i {
1954119541
static_assert_imm8!(MASK);
@@ -19587,7 +19587,7 @@ pub unsafe fn _mm256_maskz_permutex_epi64<const MASK: i32>(k: __mmask8, a: __m25
1958719587
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_permutex_pd&expand=4214)
1958819588
#[inline]
1958919589
#[target_feature(enable = "avx512f")]
19590-
#[cfg_attr(test, assert_instr(vperm, MASK = 0b10_01_10_11))] //shoud be vpermpd
19590+
#[cfg_attr(test, assert_instr(vperm, MASK = 0b10_01_10_11))] //should be vpermpd
1959119591
#[rustc_legacy_const_generics(1)]
1959219592
pub unsafe fn _mm512_permutex_pd<const MASK: i32>(a: __m512d) -> __m512d {
1959319593
static_assert_imm8!(MASK);
@@ -19612,7 +19612,7 @@ pub unsafe fn _mm512_permutex_pd<const MASK: i32>(a: __m512d) -> __m512d {
1961219612
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_permutex_pd&expand=4212)
1961319613
#[inline]
1961419614
#[target_feature(enable = "avx512f")]
19615-
#[cfg_attr(test, assert_instr(vperm, MASK = 0b10_01_10_11))] //shoud be vpermpd
19615+
#[cfg_attr(test, assert_instr(vperm, MASK = 0b10_01_10_11))] //should be vpermpd
1961619616
#[rustc_legacy_const_generics(3)]
1961719617
pub unsafe fn _mm512_mask_permutex_pd<const MASK: i32>(
1961819618
src: __m512d,
@@ -19628,7 +19628,7 @@ pub unsafe fn _mm512_mask_permutex_pd<const MASK: i32>(
1962819628
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_permutex_pd&expand=4213)
1962919629
#[inline]
1963019630
#[target_feature(enable = "avx512f")]
19631-
#[cfg_attr(test, assert_instr(vperm, MASK = 0b10_01_10_11))] //shoud be vpermpd
19631+
#[cfg_attr(test, assert_instr(vperm, MASK = 0b10_01_10_11))] //should be vpermpd
1963219632
#[rustc_legacy_const_generics(2)]
1963319633
pub unsafe fn _mm512_maskz_permutex_pd<const MASK: i32>(k: __mmask8, a: __m512d) -> __m512d {
1963419634
let r = _mm512_permutex_pd::<MASK>(a);
@@ -19641,7 +19641,7 @@ pub unsafe fn _mm512_maskz_permutex_pd<const MASK: i32>(k: __mmask8, a: __m512d)
1964119641
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_permutex_pd&expand=4211)
1964219642
#[inline]
1964319643
#[target_feature(enable = "avx512f,avx512vl")]
19644-
#[cfg_attr(test, assert_instr(vperm, MASK = 0b10_01_10_11))] //shoud be vpermpd
19644+
#[cfg_attr(test, assert_instr(vperm, MASK = 0b10_01_10_11))] //should be vpermpd
1964519645
#[rustc_legacy_const_generics(1)]
1964619646
pub unsafe fn _mm256_permutex_pd<const MASK: i32>(a: __m256d) -> __m256d {
1964719647
static_assert_imm8!(MASK);
@@ -19662,7 +19662,7 @@ pub unsafe fn _mm256_permutex_pd<const MASK: i32>(a: __m256d) -> __m256d {
1966219662
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_mask_permutex_pd&expand=4209)
1966319663
#[inline]
1966419664
#[target_feature(enable = "avx512f,avx512vl")]
19665-
#[cfg_attr(test, assert_instr(vperm, MASK = 0b10_01_10_11))] //shoud be vpermpd
19665+
#[cfg_attr(test, assert_instr(vperm, MASK = 0b10_01_10_11))] //should be vpermpd
1966619666
#[rustc_legacy_const_generics(3)]
1966719667
pub unsafe fn _mm256_mask_permutex_pd<const MASK: i32>(
1966819668
src: __m256d,
@@ -19679,7 +19679,7 @@ pub unsafe fn _mm256_mask_permutex_pd<const MASK: i32>(
1967919679
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_maskz_permutex_pd&expand=4210)
1968019680
#[inline]
1968119681
#[target_feature(enable = "avx512f,avx512vl")]
19682-
#[cfg_attr(test, assert_instr(vperm, MASK = 0b10_01_10_11))] //shoud be vpermpd
19682+
#[cfg_attr(test, assert_instr(vperm, MASK = 0b10_01_10_11))] //should be vpermpd
1968319683
#[rustc_legacy_const_generics(2)]
1968419684
pub unsafe fn _mm256_maskz_permutex_pd<const MASK: i32>(k: __mmask8, a: __m256d) -> __m256d {
1968519685
static_assert_imm8!(MASK);

‎crates/core_arch/src/x86/fxsr.rs

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
//! FXSR floating-point context fast save and restor.
1+
//! FXSR floating-point context fast save and restore.
22
33
#[cfg(test)]
44
use stdarch_test::assert_instr;

‎crates/core_arch/src/x86/sse.rs

+5-5
Original file line numberDiff line numberDiff line change
@@ -1412,19 +1412,19 @@ pub unsafe fn _mm_getcsr() -> u32 {
14121412
/// * `_MM_EXCEPT_DENORM`: An operation attempted to operate on a denormalized
14131413
/// number. Mainly this can cause loss of precision.
14141414
///
1415-
/// * `_MM_EXCEPT_DIV_ZERO`: Division by zero occured.
1415+
/// * `_MM_EXCEPT_DIV_ZERO`: Division by zero occurred.
14161416
///
1417-
/// * `_MM_EXCEPT_OVERFLOW`: A numeric overflow exception occured, i.e., a
1417+
/// * `_MM_EXCEPT_OVERFLOW`: A numeric overflow exception occurred, i.e., a
14181418
/// result was too large to be represented (e.g., an `f32` with absolute
14191419
/// value
14201420
/// greater than `2^128`).
14211421
///
1422-
/// * `_MM_EXCEPT_UNDERFLOW`: A numeric underflow exception occured, i.e., a
1422+
/// * `_MM_EXCEPT_UNDERFLOW`: A numeric underflow exception occurred, i.e., a
14231423
/// result was too small to be represented in a normalized way (e.g., an
14241424
/// `f32`
14251425
/// with absulte value smaller than `2^-126`.)
14261426
///
1427-
/// * `_MM_EXCEPT_INEXACT`: An inexact-result exception occured (a.k.a.
1427+
/// * `_MM_EXCEPT_INEXACT`: An inexact-result exception occurred (a.k.a.
14281428
/// precision exception). This means some precision was lost due to rounding.
14291429
/// For example, the fraction `1/3` cannot be represented accurately in a
14301430
/// 32 or 64 bit float and computing it would cause this exception to be
@@ -1752,7 +1752,7 @@ pub const _MM_HINT_ET1: i32 = 6;
17521752
#[rustc_legacy_const_generics(1)]
17531753
#[stable(feature = "simd_x86", since = "1.27.0")]
17541754
pub unsafe fn _mm_prefetch<const STRATEGY: i32>(p: *const i8) {
1755-
// We use the `llvm.prefetch` instrinsic with `cache type` = 1 (data cache).
1755+
// We use the `llvm.prefetch` intrinsic with `cache type` = 1 (data cache).
17561756
// `locality` and `rw` are based on our `STRATEGY`.
17571757
prefetch(p, (STRATEGY >> 2) & 1, STRATEGY & 3, 1);
17581758
}

‎crates/core_arch/src/x86/sse41.rs

+2-2
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,7 @@ use crate::{
88
#[cfg(test)]
99
use stdarch_test::assert_instr;
1010

11-
// SSE4 rounding constans
11+
// SSE4 rounding constants
1212
/// round to nearest
1313
#[stable(feature = "simd_x86", since = "1.27.0")]
1414
pub const _MM_FROUND_TO_NEAREST_INT: i32 = 0x00;
@@ -830,7 +830,7 @@ pub unsafe fn _mm_round_sd<const ROUNDING: i32>(a: __m128d, b: __m128d) -> __m12
830830
/// using the `ROUNDING` parameter, store the result as a single-precision
831831
/// floating-point element in the lower element of the intrinsic result,
832832
/// and copies the upper 3 packed elements from `a` to the upper elements
833-
/// of the instrinsic result.
833+
/// of the intrinsic result.
834834
/// Rounding is done according to the rounding parameter, which can be one of:
835835
///
836836
/// ```

‎crates/core_arch/src/x86/sse42.rs

+1-1
Original file line numberDiff line numberDiff line change
@@ -146,7 +146,7 @@ pub unsafe fn _mm_cmpistrm<const IMM8: i32>(a: __m128i, b: __m128i) -> __m128i {
146146
/// # }
147147
/// ```
148148
///
149-
/// The `_mm_cmpistri` intrinsic may also be used to find the existance of
149+
/// The `_mm_cmpistri` intrinsic may also be used to find the existence of
150150
/// one or more of a given set of characters in the haystack.
151151
///
152152
/// ```

‎crates/core_arch/src/x86/sse4a.rs

+1-1
Original file line numberDiff line numberDiff line change
@@ -32,7 +32,7 @@ extern "C" {
3232
/// If the length is zero, it is interpreted as `64`. If the length and index
3333
/// are zero, the lower 64 bits of `x` are extracted.
3434
///
35-
/// If `length == 0 && index > 0` or `lenght + index > 64` the result is
35+
/// If `length == 0 && index > 0` or `length + index > 64` the result is
3636
/// undefined.
3737
#[inline]
3838
#[target_feature(enable = "sse4a")]

‎crates/core_arch/src/x86_64/fxsr.rs

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
//! FXSR floating-point context fast save and restor.
1+
//! FXSR floating-point context fast save and restore.
22
33
#[cfg(test)]
44
use stdarch_test::assert_instr;

‎crates/intrinsic-test/src/argument.rs

+2-2
Original file line numberDiff line numberDiff line change
@@ -55,7 +55,7 @@ pub struct ArgumentList {
5555
}
5656

5757
impl ArgumentList {
58-
/// Converts the argument list into the call paramters for a C function call.
58+
/// Converts the argument list into the call parameters for a C function call.
5959
/// e.g. this would generate something like `a, &b, c`
6060
pub fn as_call_param_c(&self) -> String {
6161
self.args
@@ -70,7 +70,7 @@ impl ArgumentList {
7070
.join(", ")
7171
}
7272

73-
/// Converts the argument list into the call paramters for a Rust function.
73+
/// Converts the argument list into the call parameters for a Rust function.
7474
/// e.g. this would generate something like `a, b, c`
7575
pub fn as_call_param_rust(&self) -> String {
7676
self.args

‎crates/intrinsic-test/src/intrinsic.rs

+1-1
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,7 @@ pub struct Intrinsic {
88
/// The function name of this intrinsic.
99
pub name: String,
1010

11-
/// Any arguments for this intrinsinc.
11+
/// Any arguments for this intrinsic.
1212
pub arguments: ArgumentList,
1313

1414
/// The return type of this intrinsic.

‎crates/std_detect/src/detect/arch/aarch64.rs

+3-3
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,7 @@ features! {
88
/// Currently most features are only supported on linux-based platforms.
99
///
1010
/// This macro takes one argument which is a string literal of the feature being tested for.
11-
/// The feature names are mostly taken from their FEAT_* definitiions in the [ARM Architecture
11+
/// The feature names are mostly taken from their FEAT_* definitions in the [ARM Architecture
1212
/// Reference Manual][docs].
1313
///
1414
/// ## Supported arguments
@@ -104,9 +104,9 @@ features! {
104104
@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] pauth: "pauth";
105105
/// FEAT_PAuth (pointer authentication)
106106
@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] dpb: "dpb";
107-
/// FEAT_DPB (aka dcpop - data cache clean to point of persistance)
107+
/// FEAT_DPB (aka dcpop - data cache clean to point of persistence)
108108
@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] dpb2: "dpb2";
109-
/// FEAT_DPB2 (aka dcpodp - data cache clean to point of deep persistance)
109+
/// FEAT_DPB2 (aka dcpodp - data cache clean to point of deep persistence)
110110
@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] sve2: "sve2";
111111
/// FEAT_SVE2 (Scalable Vector Extension 2)
112112
@FEATURE: #[unstable(feature = "stdsimd", issue = "27731")] sve2_aes: "sve2-aes";

‎crates/std_detect/src/detect/arch/x86.rs

+2-2
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@
33
//! The features are detected using the `detect_features` function below.
44
//! This function uses the CPUID instruction to read the feature flags from the
55
//! CPU and encodes them in a `usize` where each bit position represents
6-
//! whether a feature is available (bit is set) or unavaiable (bit is cleared).
6+
//! whether a feature is available (bit is set) or unavailable (bit is cleared).
77
//!
88
//! The enum `Feature` is used to map bit positions to feature names, and the
99
//! the `__crate::detect::check_for!` macro is used to map string literals (e.g.,
@@ -178,7 +178,7 @@ features! {
178178
@FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] popcnt: "popcnt";
179179
/// POPCNT (Population Count)
180180
@FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] fxsr: "fxsr";
181-
/// FXSR (Floating-point context fast save and restor)
181+
/// FXSR (Floating-point context fast save and restore)
182182
@FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] xsave: "xsave";
183183
/// XSAVE (Save Processor Extended States)
184184
@FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] xsaveopt: "xsaveopt";

‎crates/stdarch-gen/neon.spec

+3-3
Original file line numberDiff line numberDiff line change
@@ -56,7 +56,7 @@
5656
// MAX - maximal value proper to overflow
5757
//
5858
// # validate <values>
59-
// Validates a and b aginst the expected result of the test.
59+
// Validates a and b against the expected result of the test.
6060
// The special values 'TRUE' and 'FALSE' can be used to
6161
// represent the correct NEON representation of true or
6262
// false values. It too gets scaled to the type.
@@ -4685,7 +4685,7 @@ link-arm = vmaxs._EXT_
46854685
link-aarch64 = fmax._EXT_
46864686
generate float*_t
46874687

4688-
/// Floating-point Maximun Number (vector)
4688+
/// Floating-point Maximum Number (vector)
46894689
name = vmaxnm
46904690
a = 1.0, 2.0, 3.0, -4.0
46914691
b = 8.0, 16.0, -1.0, 6.0
@@ -4789,7 +4789,7 @@ link-arm = vmins._EXT_
47894789
link-aarch64 = fmin._EXT_
47904790
generate float*_t
47914791

4792-
/// Floating-point Minimun Number (vector)
4792+
/// Floating-point Minimum Number (vector)
47934793
name = vminnm
47944794
a = 1.0, 2.0, 3.0, -4.0
47954795
b = 8.0, 16.0, -1.0, 6.0

‎crates/stdarch-gen/src/main.rs

+4-4
Original file line numberDiff line numberDiff line change
@@ -2806,7 +2806,7 @@ fn get_call(
28062806
let s = &params[i];
28072807
if s.starts_with('{') {
28082808
let mut sub_fn = String::new();
2809-
let mut paranthes = 0;
2809+
let mut parentheses = 0;
28102810
while i < params.len() {
28112811
if !sub_fn.is_empty() {
28122812
sub_fn.push_str(", ");
@@ -2815,19 +2815,19 @@ fn get_call(
28152815
let l = params[i].len();
28162816
for j in 0..l {
28172817
if &params[i][j..j + 1] == "{" {
2818-
paranthes += 1;
2818+
parentheses += 1;
28192819
} else {
28202820
break;
28212821
}
28222822
}
28232823
for j in 0..l {
28242824
if &params[i][l - j - 1..l - j] == "}" {
2825-
paranthes -= 1;
2825+
parentheses -= 1;
28262826
} else {
28272827
break;
28282828
}
28292829
}
2830-
if paranthes == 0 {
2830+
if parentheses == 0 {
28312831
break;
28322832
}
28332833
i += 1;

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