[mlir][vector] Fix invalid IR in vector.print lowering
#74410
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`DecomposePrintOpConversion` used to generate invalid op such as: ``` error: 'arith.extsi' op operand type 'vector<10xi32>' and result type 'vector<10xi32>' are cast incompatible vector.print %v9 : vector<10xi32> ``` This commit fixes tests such as `mlir/test/Integration/Dialect/Vector/CPU/test-reductions-i32.mlir` when verifying the IR after each pattern (llvm#74270).
matthias-springer
requested review from
MacDue,
dcaballe and
nicolasvasilache
Member
|
@llvm/pr-subscribers-mlir Author: Matthias Springer (matthias-springer) Changes
This commit fixes tests such as 1 Files Affected:
diff --git a/mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp b/mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
index 33a77d7576ba7..2ee314e9fedfe 100644
--- a/mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
+++ b/mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
@@ -726,12 +726,14 @@ struct DecomposePrintOpConversion : public VectorToSCFPattern<vector::PrintOp> {
auto targetVectorType = vectorType.cloneWith({}, legalIntTy);
value = rewriter.create<vector::BitCastOp>(loc, signlessSourceVectorType,
value);
- if (width == 1 || intTy.isUnsigned())
- value = rewriter.create<arith::ExtUIOp>(loc, signlessTargetVectorType,
- value);
- else
- value = rewriter.create<arith::ExtSIOp>(loc, signlessTargetVectorType,
- value);
+ if (value.getType() != signlessTargetVectorType) {
+ if (width == 1 || intTy.isUnsigned())
+ value = rewriter.create<arith::ExtUIOp>(loc, signlessTargetVectorType,
+ value);
+ else
+ value = rewriter.create<arith::ExtSIOp>(loc, signlessTargetVectorType,
+ value);
+ }
value = rewriter.create<vector::BitCastOp>(loc, targetVectorType, value);
vectorType = targetVectorType;
}
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nicolasvasilache
approved these changes
Dec 5, 2023
Collaborator
|
Thanks Matthias for all the fixes! |
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DecomposePrintOpConversionused to generate invalid op such as:This commit fixes tests such as
mlir/test/Integration/Dialect/Vector/CPU/test-reductions-i32.mlirwhen verifying the IR after each pattern application (#74270).