[SPIR-V] Don't lower builtin variadic functions by sarnex · Pull Request #188517 · llvm/llvm-project

sarnex · 2026-03-25T15:46:03Z

In #178980 I tried to remove the special handling for printf, but the fix was wrong, the pass expects that printf abides by the variadic ABI (single buffer passed in, args extracted by caller), which isn't how it works.

However the root issue is with any builtin, they are just replaced directly with instructions, and the only place that could generate code to honor the variadic ABI would bei in the SPIR-V backend, and it would be pretty complicated for pretty much no benefit.

It's much simpler to teach the pass to skip certain functions, as we did before, but this time skip all SPIR-V builtin.

Signed-off-by: Nick Sarnie <[email protected]>

jhuber6

So this goes back to the old handling?

sarnex · 2026-03-25T15:56:20Z

For builtins, unfortunately yes.

My previous change was totally wrong, I thought the IR extracted each arg out of the vararg buffer before the call to the builtin but it doesnt't, it passes the vararg buffer in its entirety expecting the callee to know to extract them itself. That makes sense for cases where the callee definition is processed by the same pass or otherwise follows the same ABI.

Builtins aren't going to do that, the calls to them get replaced directly with an instruction, and trying to add new logic to the backend to extract args out of the vararg buffer seems not the right solution.

jhuber6 · 2026-03-25T15:58:01Z

For builtins, unfortunately yes.

My previous change was totally wrong, I thought the IR extracted each arg out of the vararg buffer before the call to the builtin but it doesnt't, it passes the vararg buffer in its entirety expecting the callee to know to extract them itself. That makes sense for cases where the callee definition is processed by the same pass or otherwise follows the same ABI.

Builtins aren't going to do that, the calls to them get replaced directly with an instruction, and trying to add new logic to the backend to extract args out of the vararg buffer seems not the right solution.

My preferred solution would be to stop handling printf in 50 billion different ways, but that's a pipe dream apparently.

sarnex · 2026-03-25T16:03:35Z

My lawyer answer is this is intended for any variadic builtins and is true because of the direct function to instruction replacement but yeah, not exactly clean code here.

llvmbot · 2026-03-25T21:09:42Z

@llvm/pr-subscribers-llvm-transforms

Author: Nick Sarnie (sarnex)

Changes

In #178980 I tried to remove the special handling for printf, but the fix was wrong, the pass expects that printf abides by the variadic ABI (single buffer passed in, args extracted by caller), which isn't how it works.

However the root issue is with any builtin, they are just replaced directly with instructions, and the only place that could generate code to honor the variadic ABI would bei in the SPIR-V backend, and it would be pretty complicated for pretty much no benefit.

It's much simpler to teach the pass to skip certain functions, as we did before, but this time skip all SPIR-V builtin.

Full diff: https://github.com/llvm/llvm-project/pull/188517.diff

2 Files Affected:

(modified) llvm/lib/Transforms/IPO/ExpandVariadics.cpp (+32)
(modified) llvm/test/CodeGen/SPIRV/printf.ll (+17-19)

diff --git a/llvm/lib/Transforms/IPO/ExpandVariadics.cpp b/llvm/lib/Transforms/IPO/ExpandVariadics.cpp
index 97b95cce2a407..c07ea8093c9d6 100644
--- a/llvm/lib/Transforms/IPO/ExpandVariadics.cpp
+++ b/llvm/lib/Transforms/IPO/ExpandVariadics.cpp
@@ -129,6 +129,9 @@ class VariadicABIInfo {
   bool vaEndIsNop() { return true; }
   bool vaCopyIsMemcpy() { return true; }
 
+  // Per-target overrides of special symbols.
+  virtual bool ignoreFunction(Function *F) { return false; }
+
   // Any additional address spaces used in va intrinsics that should be
   // expanded.
   virtual SmallVector<unsigned> getTargetSpecificVaIntrinAddrSpaces() const {
@@ -242,6 +245,9 @@ class ExpandVariadics : public ModulePass {
         F->hasFnAttribute(Attribute::Naked))
       return false;
 
+    if (ABI->ignoreFunction(F))
+      return false;
+
     if (!isValidCallingConv(F))
       return false;
 
@@ -627,6 +633,9 @@ bool ExpandVariadics::expandCall(Module &M, IRBuilder<> &Builder, CallBase *CB,
   bool Changed = false;
   const DataLayout &DL = M.getDataLayout();
 
+  if (ABI->ignoreFunction(CB->getCalledFunction()))
+    return Changed;
+
   if (!expansionApplicableToFunctionCall(CB)) {
     if (rewriteABI())
       report_fatal_error("Cannot lower callbase instruction");
@@ -984,6 +993,29 @@ struct SPIRV final : public VariadicABIInfo {
     return {A, false};
   }
 
+  // The SPIR-V backend has special handling for builtins.
+  bool ignoreFunction(Function *F) override {
+    if (!F->isDeclaration())
+      return false;
+
+    StringRef Name = F->getName();
+
+    // Skip any SPIR-V builtins.
+    if (Name.contains("__spirv_"))
+      return true;
+
+    // Skip the builtin printf function.
+    if (Name.contains("printf")) {
+      std::string Demangled = llvm::demangle(Name.str());
+      // Demangled name will be "printf(...)" for the builtin, "printf" for
+      // unmangled extern "C", or "namespace::printf(...)" for namespaced.
+      if (StringRef(Demangled).starts_with("printf(") || Demangled == "printf")
+        return true;
+    }
+
+    return false;
+  }
+
   // We will likely see va intrinsics in the generic addrspace (4).
   SmallVector<unsigned> getTargetSpecificVaIntrinAddrSpaces() const override {
     return {4};
diff --git a/llvm/test/CodeGen/SPIRV/printf.ll b/llvm/test/CodeGen/SPIRV/printf.ll
index f2747901c54e0..1227b75fca92d 100644
--- a/llvm/test/CodeGen/SPIRV/printf.ll
+++ b/llvm/test/CodeGen/SPIRV/printf.ll
@@ -6,35 +6,33 @@
 
 ; CHECK: %[[#ExtImport:]] = OpExtInstImport "OpenCL.std"
 ; CHECK: %[[#Char:]] = OpTypeInt 8 0
-; CHECK: %[[#ConstCharPtr:]] = OpTypePointer UniformConstant %[[#Char]]
-; CHECK: %[[#VarargStruct:]] = OpTypeStruct %[[#Char]]
-; CHECK: %[[#VarargStructPtr:]] = OpTypePointer Function %[[#VarargStruct]]
-; CHECK: %[[#CharPtr:]] = OpTypePointer Function %[[#Char]]
-; CHECK: %[[#IntConst:]] = OpConstant %[[#Char]] 97
+; CHECK: %[[#CharPtr:]] = OpTypePointer UniformConstant %[[#Char]]
 ; CHECK: %[[#GV:]] = OpVariable %[[#]] UniformConstant %[[#]]
 ; CHECK: OpFunction
-; CHECK: %[[#Arg:]] = OpFunctionParameter
-; CHECK: %[[#VarargBuffer1:]] = OpVariable %[[#VarargStructPtr]] Function
-; CHECK: %[[#VarargBuffer2:]] = OpVariable %[[#VarargStructPtr]] Function
-; CHECK: %[[#CastedBuffer1:]] = OpBitcast %[[#CharPtr]] %[[#VarargBuffer1]]
-; CHECK: %[[#GEP1:]] = OpInBoundsPtrAccessChain %[[#CharPtr]] %[[#VarargBuffer1]]
-; CHECK: OpStore %[[#GEP1]] %[[#IntConst]] Aligned 1
-; CHECK: %[[#CastedGV:]] = OpBitcast %[[#ConstCharPtr]] %[[#GV]]
-; CHECK: OpExtInst %[[#]] %[[#ExtImport]] printf %[[#CastedGV]] %[[#CastedBuffer1:]]
-; CHECK: %[[#CastedBuffer2:]] = OpBitcast %[[#CharPtr]] %[[#VarargBuffer2]]
-; CHECK: %[[#GEP2:]] = OpInBoundsPtrAccessChain %[[#CharPtr]] %[[#VarargBuffer2]]
-; CHECK: OpStore %[[#GEP2]] %[[#IntConst]] Aligned 1
-; CHECK: OpExtInst %[[#]] %[[#ExtImport]] printf %[[#Arg]] %[[#CastedBuffer2:]]
+; CHECK: %[[#Arg1:]] = OpFunctionParameter
+; CHECK: %[[#Arg2:]] = OpFunctionParameter
+; CHECK: %[[#CastedGV:]] = OpBitcast %[[#CharPtr]] %[[#GV]]
+; CHECK-NEXT: OpExtInst %[[#]] %[[#ExtImport]] printf %[[#CastedGV]] %[[#ArgConst:]]
+; CHECK-NEXT: OpExtInst %[[#]] %[[#ExtImport]] printf %[[#CastedGV]] %[[#ArgConst]]
+; CHECK-NEXT: OpExtInst %[[#]] %[[#ExtImport]] printf %[[#Arg1]] %[[#ArgConst]]
+; CHECK-NEXT: OpExtInst %[[#]] %[[#ExtImport]] printf %[[#Arg1]] %[[#ArgConst]]
+; CHECK-NEXT: %[[#CastedArg2:]] = OpBitcast %[[#CharPtr]] %[[#Arg2]]
+; CHECK-NEXT: OpExtInst %[[#]] %[[#ExtImport]] printf %[[#CastedArg2]] %[[#ArgConst]]
+; CHECK-NEXT: OpExtInst %[[#]] %[[#ExtImport]] printf %[[#CastedArg2]] %[[#ArgConst]]
 ; CHECK: OpFunctionEnd
 
 %struct = type { [6 x i8] }
 
 @FmtStr = internal addrspace(2) constant [6 x i8] c"c=%c\0A\00", align 1
 
-define spir_kernel void @foo(ptr addrspace(2) %_arg_fmt) {
+define spir_kernel void @foo(ptr addrspace(2) %_arg_fmt1, ptr addrspace(2) byval(%struct) %_arg_fmt2) {
 entry:
   %r1 = tail call spir_func i32 (ptr addrspace(2), ...) @_Z6printfPU3AS2Kcz(ptr addrspace(2) @FmtStr, i8 signext 97)
-  %r2 = tail call spir_func i32 (ptr addrspace(2), ...) @_Z18__spirv_ocl_printfPU3AS2Kcz(ptr addrspace(2) %_arg_fmt, i8 signext 97)
+  %r2 = tail call spir_func i32 (ptr addrspace(2), ...) @_Z18__spirv_ocl_printfPU3AS2Kcz(ptr addrspace(2) @FmtStr, i8 signext 97)
+  %r3 = tail call spir_func i32 (ptr addrspace(2), ...) @_Z6printfPU3AS2Kcz(ptr addrspace(2) %_arg_fmt1, i8 signext 97)
+  %r4 = tail call spir_func i32 (ptr addrspace(2), ...) @_Z18__spirv_ocl_printfPU3AS2Kcz(ptr addrspace(2) %_arg_fmt1, i8 signext 97)
+  %r5 = tail call spir_func i32 (ptr addrspace(2), ...) @_Z6printfPU3AS2Kcz(ptr addrspace(2) %_arg_fmt2, i8 signext 97)
+  %r6 = tail call spir_func i32 (ptr addrspace(2), ...) @_Z18__spirv_ocl_printfPU3AS2Kcz(ptr addrspace(2) %_arg_fmt2, i8 signext 97)
   ret void
 }

llvmbot · 2026-03-25T21:09:42Z

@llvm/pr-subscribers-backend-spir-v

Author: Nick Sarnie (sarnex)

Changes

In #178980 I tried to remove the special handling for printf, but the fix was wrong, the pass expects that printf abides by the variadic ABI (single buffer passed in, args extracted by caller), which isn't how it works.

However the root issue is with any builtin, they are just replaced directly with instructions, and the only place that could generate code to honor the variadic ABI would bei in the SPIR-V backend, and it would be pretty complicated for pretty much no benefit.

It's much simpler to teach the pass to skip certain functions, as we did before, but this time skip all SPIR-V builtin.

Full diff: https://github.com/llvm/llvm-project/pull/188517.diff

2 Files Affected:

(modified) llvm/lib/Transforms/IPO/ExpandVariadics.cpp (+32)
(modified) llvm/test/CodeGen/SPIRV/printf.ll (+17-19)

diff --git a/llvm/lib/Transforms/IPO/ExpandVariadics.cpp b/llvm/lib/Transforms/IPO/ExpandVariadics.cpp
index 97b95cce2a407..c07ea8093c9d6 100644
--- a/llvm/lib/Transforms/IPO/ExpandVariadics.cpp
+++ b/llvm/lib/Transforms/IPO/ExpandVariadics.cpp
@@ -129,6 +129,9 @@ class VariadicABIInfo {
   bool vaEndIsNop() { return true; }
   bool vaCopyIsMemcpy() { return true; }
 
+  // Per-target overrides of special symbols.
+  virtual bool ignoreFunction(Function *F) { return false; }
+
   // Any additional address spaces used in va intrinsics that should be
   // expanded.
   virtual SmallVector<unsigned> getTargetSpecificVaIntrinAddrSpaces() const {
@@ -242,6 +245,9 @@ class ExpandVariadics : public ModulePass {
         F->hasFnAttribute(Attribute::Naked))
       return false;
 
+    if (ABI->ignoreFunction(F))
+      return false;
+
     if (!isValidCallingConv(F))
       return false;
 
@@ -627,6 +633,9 @@ bool ExpandVariadics::expandCall(Module &M, IRBuilder<> &Builder, CallBase *CB,
   bool Changed = false;
   const DataLayout &DL = M.getDataLayout();
 
+  if (ABI->ignoreFunction(CB->getCalledFunction()))
+    return Changed;
+
   if (!expansionApplicableToFunctionCall(CB)) {
     if (rewriteABI())
       report_fatal_error("Cannot lower callbase instruction");
@@ -984,6 +993,29 @@ struct SPIRV final : public VariadicABIInfo {
     return {A, false};
   }
 
+  // The SPIR-V backend has special handling for builtins.
+  bool ignoreFunction(Function *F) override {
+    if (!F->isDeclaration())
+      return false;
+
+    StringRef Name = F->getName();
+
+    // Skip any SPIR-V builtins.
+    if (Name.contains("__spirv_"))
+      return true;
+
+    // Skip the builtin printf function.
+    if (Name.contains("printf")) {
+      std::string Demangled = llvm::demangle(Name.str());
+      // Demangled name will be "printf(...)" for the builtin, "printf" for
+      // unmangled extern "C", or "namespace::printf(...)" for namespaced.
+      if (StringRef(Demangled).starts_with("printf(") || Demangled == "printf")
+        return true;
+    }
+
+    return false;
+  }
+
   // We will likely see va intrinsics in the generic addrspace (4).
   SmallVector<unsigned> getTargetSpecificVaIntrinAddrSpaces() const override {
     return {4};
diff --git a/llvm/test/CodeGen/SPIRV/printf.ll b/llvm/test/CodeGen/SPIRV/printf.ll
index f2747901c54e0..1227b75fca92d 100644
--- a/llvm/test/CodeGen/SPIRV/printf.ll
+++ b/llvm/test/CodeGen/SPIRV/printf.ll
@@ -6,35 +6,33 @@
 
 ; CHECK: %[[#ExtImport:]] = OpExtInstImport "OpenCL.std"
 ; CHECK: %[[#Char:]] = OpTypeInt 8 0
-; CHECK: %[[#ConstCharPtr:]] = OpTypePointer UniformConstant %[[#Char]]
-; CHECK: %[[#VarargStruct:]] = OpTypeStruct %[[#Char]]
-; CHECK: %[[#VarargStructPtr:]] = OpTypePointer Function %[[#VarargStruct]]
-; CHECK: %[[#CharPtr:]] = OpTypePointer Function %[[#Char]]
-; CHECK: %[[#IntConst:]] = OpConstant %[[#Char]] 97
+; CHECK: %[[#CharPtr:]] = OpTypePointer UniformConstant %[[#Char]]
 ; CHECK: %[[#GV:]] = OpVariable %[[#]] UniformConstant %[[#]]
 ; CHECK: OpFunction
-; CHECK: %[[#Arg:]] = OpFunctionParameter
-; CHECK: %[[#VarargBuffer1:]] = OpVariable %[[#VarargStructPtr]] Function
-; CHECK: %[[#VarargBuffer2:]] = OpVariable %[[#VarargStructPtr]] Function
-; CHECK: %[[#CastedBuffer1:]] = OpBitcast %[[#CharPtr]] %[[#VarargBuffer1]]
-; CHECK: %[[#GEP1:]] = OpInBoundsPtrAccessChain %[[#CharPtr]] %[[#VarargBuffer1]]
-; CHECK: OpStore %[[#GEP1]] %[[#IntConst]] Aligned 1
-; CHECK: %[[#CastedGV:]] = OpBitcast %[[#ConstCharPtr]] %[[#GV]]
-; CHECK: OpExtInst %[[#]] %[[#ExtImport]] printf %[[#CastedGV]] %[[#CastedBuffer1:]]
-; CHECK: %[[#CastedBuffer2:]] = OpBitcast %[[#CharPtr]] %[[#VarargBuffer2]]
-; CHECK: %[[#GEP2:]] = OpInBoundsPtrAccessChain %[[#CharPtr]] %[[#VarargBuffer2]]
-; CHECK: OpStore %[[#GEP2]] %[[#IntConst]] Aligned 1
-; CHECK: OpExtInst %[[#]] %[[#ExtImport]] printf %[[#Arg]] %[[#CastedBuffer2:]]
+; CHECK: %[[#Arg1:]] = OpFunctionParameter
+; CHECK: %[[#Arg2:]] = OpFunctionParameter
+; CHECK: %[[#CastedGV:]] = OpBitcast %[[#CharPtr]] %[[#GV]]
+; CHECK-NEXT: OpExtInst %[[#]] %[[#ExtImport]] printf %[[#CastedGV]] %[[#ArgConst:]]
+; CHECK-NEXT: OpExtInst %[[#]] %[[#ExtImport]] printf %[[#CastedGV]] %[[#ArgConst]]
+; CHECK-NEXT: OpExtInst %[[#]] %[[#ExtImport]] printf %[[#Arg1]] %[[#ArgConst]]
+; CHECK-NEXT: OpExtInst %[[#]] %[[#ExtImport]] printf %[[#Arg1]] %[[#ArgConst]]
+; CHECK-NEXT: %[[#CastedArg2:]] = OpBitcast %[[#CharPtr]] %[[#Arg2]]
+; CHECK-NEXT: OpExtInst %[[#]] %[[#ExtImport]] printf %[[#CastedArg2]] %[[#ArgConst]]
+; CHECK-NEXT: OpExtInst %[[#]] %[[#ExtImport]] printf %[[#CastedArg2]] %[[#ArgConst]]
 ; CHECK: OpFunctionEnd
 
 %struct = type { [6 x i8] }
 
 @FmtStr = internal addrspace(2) constant [6 x i8] c"c=%c\0A\00", align 1
 
-define spir_kernel void @foo(ptr addrspace(2) %_arg_fmt) {
+define spir_kernel void @foo(ptr addrspace(2) %_arg_fmt1, ptr addrspace(2) byval(%struct) %_arg_fmt2) {
 entry:
   %r1 = tail call spir_func i32 (ptr addrspace(2), ...) @_Z6printfPU3AS2Kcz(ptr addrspace(2) @FmtStr, i8 signext 97)
-  %r2 = tail call spir_func i32 (ptr addrspace(2), ...) @_Z18__spirv_ocl_printfPU3AS2Kcz(ptr addrspace(2) %_arg_fmt, i8 signext 97)
+  %r2 = tail call spir_func i32 (ptr addrspace(2), ...) @_Z18__spirv_ocl_printfPU3AS2Kcz(ptr addrspace(2) @FmtStr, i8 signext 97)
+  %r3 = tail call spir_func i32 (ptr addrspace(2), ...) @_Z6printfPU3AS2Kcz(ptr addrspace(2) %_arg_fmt1, i8 signext 97)
+  %r4 = tail call spir_func i32 (ptr addrspace(2), ...) @_Z18__spirv_ocl_printfPU3AS2Kcz(ptr addrspace(2) %_arg_fmt1, i8 signext 97)
+  %r5 = tail call spir_func i32 (ptr addrspace(2), ...) @_Z6printfPU3AS2Kcz(ptr addrspace(2) %_arg_fmt2, i8 signext 97)
+  %r6 = tail call spir_func i32 (ptr addrspace(2), ...) @_Z18__spirv_ocl_printfPU3AS2Kcz(ptr addrspace(2) %_arg_fmt2, i8 signext 97)
   ret void
 }

Signed-off-by: Nick Sarnie <[email protected]>

MrSidims

LGTM with a note about function names check is not efficient. But I feel like my review is neither gating nor sufficient for this PR.

Signed-off-by: Nick Sarnie <[email protected]>

maarquitos14 · 2026-03-31T09:45:44Z

+  %r3 = tail call spir_func i32 (ptr addrspace(2), ...) @_Z6printfPU3AS2Kcz(ptr addrspace(2) %_arg_fmt1, i8 signext 97)
+  %r4 = tail call spir_func i32 (ptr addrspace(2), ...) @_Z18__spirv_ocl_printfPU3AS2Kcz(ptr addrspace(2) %_arg_fmt1, i8 signext 97)
+  %r5 = tail call spir_func i32 (ptr addrspace(2), ...) @_Z6printfPU3AS2Kcz(ptr addrspace(2) %_arg_fmt2, i8 signext 97)
+  %r6 = tail call spir_func i32 (ptr addrspace(2), ...) @_Z18__spirv_ocl_printfPU3AS2Kcz(ptr addrspace(2) %_arg_fmt2, i8 signext 97)


Can we add a couple of negative test cases having __spirv_ and printf at the middle of the name, so we make sure those would not be skipped?

Thanks for the review. Sure, let me add those.

Signed-off-by: Nick Sarnie <[email protected]>

llvm-ci · 2026-04-01T13:25:24Z

LLVM Buildbot has detected a new failure on builder ppc64le-mlir-rhel-clang running on ppc64le-mlir-rhel-test while building llvm at step 6 "test-build-check-mlir-build-only-check-mlir".

Full details are available at: https://lab.llvm.org/buildbot/#/builders/129/builds/41797

Here is the relevant piece of the build log for the reference

Step 6 (test-build-check-mlir-build-only-check-mlir) failure: 1200 seconds without output running [b'ninja', b'check-mlir'], attempting to kill
...
PASS: MLIR :: mlir-opt/split-markers.mlir (3997 of 4007)
PASS: MLIR :: mlir-runner/verify-entry-point.mlir (3998 of 4007)
PASS: MLIR :: mlir-tblgen/attr-or-type-format.td (3999 of 4007)
PASS: MLIR :: mlir-tblgen/cpp-class-comments.td (4000 of 4007)
PASS: MLIR :: mlir-runner/utils.mlir (4001 of 4007)
PASS: MLIR :: mlir-tblgen/llvm-intrinsics.td (4002 of 4007)
PASS: MLIR :: Pass/remarks.mlir (4003 of 4007)
PASS: MLIR :: Pass/pipeline-parsing.mlir (4004 of 4007)
PASS: MLIR :: mlir-runner/simple.mlir (4005 of 4007)
PASS: MLIR :: mlir-tblgen/op-error.td (4006 of 4007)
command timed out: 1200 seconds without output running [b'ninja', b'check-mlir'], attempting to kill
process killed by signal 9
program finished with exit code -1
elapsedTime=2928.189537

llvm#188517 fixed regression.

#188517 fixed regression.

llvm/llvm-project#188517 fixed regression.

[SPIR-V] Don't lower builtin variadic functions

cacd7c5

Signed-off-by: Nick Sarnie <[email protected]>

jhuber6 reviewed Mar 25, 2026

View reviewed changes

sarnex marked this pull request as ready for review March 25, 2026 21:09

llvmbot added backend:SPIR-V llvm:transforms labels Mar 25, 2026

sarnex requested review from Keenuts, MrSidims and maarquitos14 March 25, 2026 21:09

MrSidims requested review from jmmartinez and s-perron March 26, 2026 16:10

MrSidims reviewed Mar 27, 2026

View reviewed changes

Comment thread llvm/lib/Transforms/IPO/ExpandVariadics.cpp

Comment thread llvm/lib/Transforms/IPO/ExpandVariadics.cpp Outdated

Comment thread llvm/lib/Transforms/IPO/ExpandVariadics.cpp Outdated

address feedback

4e96ba7

Signed-off-by: Nick Sarnie <[email protected]>

MrSidims approved these changes Mar 27, 2026

View reviewed changes

address feedback 2

af8f018

Signed-off-by: Nick Sarnie <[email protected]>

maarquitos14 approved these changes Mar 31, 2026

View reviewed changes

add negative test

62ca03f

Signed-off-by: Nick Sarnie <[email protected]>

sarnex merged commit 6669fa5 into llvm:main Mar 31, 2026
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silee2 mentioned this pull request Apr 8, 2026

[SPIRV] Fix printf regression after #178980 #182423

Closed

silee2 added a commit to silee2/llvm-project that referenced this pull request Apr 8, 2026

[MLIR][XeVM] Re-enable gpu.printf test.

b4f0297

llvm#188517 fixed regression.

silee2 mentioned this pull request Apr 8, 2026

[MLIR][XeVM] Re-enable gpu.printf test. #191056

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silee2 added a commit that referenced this pull request Apr 10, 2026

[MLIR][XeVM] Re-enable gpu.printf test. (#191056)

8ed9a04

#188517 fixed regression.

llvm-sync Bot pushed a commit to arm/arm-toolchain that referenced this pull request Apr 10, 2026

Automerge: [MLIR][XeVM] Re-enable gpu.printf test. (#191056)

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llvm/llvm-project#188517 fixed regression.

cpullvm-upstream-sync Bot pushed a commit to navaneethshan/cpullvm-toolchain-1 that referenced this pull request Apr 13, 2026

Automerge: [MLIR][XeVM] Re-enable gpu.printf test. (#191056)

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llvm/llvm-project#188517 fixed regression.

llvm-upstreamsync Bot pushed a commit to qualcomm/cpullvm-toolchain that referenced this pull request Apr 24, 2026

Automerge: [MLIR][XeVM] Re-enable gpu.printf test. (#191056)

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llvm/llvm-project#188517 fixed regression.

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[SPIR-V] Don't lower builtin variadic functions#188517

[SPIR-V] Don't lower builtin variadic functions#188517
sarnex merged 4 commits intollvm:mainfrom
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llvm-ci commented Apr 1, 2026

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6 participants

sarnex commented Mar 25, 2026 •

edited

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sarnex commented Mar 25, 2026 •

edited

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sarnex commented Mar 25, 2026 •

edited

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