[X86] Sync compiler-rt cpu subtypes and vendors with libgcc and refactor internal cpu type tables in LLVM#171172
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mikolaj-pirog merged 17 commits intoJul 7, 2026
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@llvm/pr-subscribers-clang-codegen Author: Mikołaj Piróg (mikolaj-pirog) ChangesThis is a continuation of previous PR: #168750 compiler-rt was synced with libgcc on ProcessorVendor and ProcessorSubtype fields and so was llvm. Cpu type, subtype and vendor entries in X86TargetParser.def were refactored to use ABI_VALUE. LLVM doesn't set the ABI_VALUE for its enums -- clang now takes care of that by reading the ABI_VALUE. I've removed and added some comments to better explain what is going on. 6 Files Affected:
diff --git a/clang/lib/Basic/Targets/X86.cpp b/clang/lib/Basic/Targets/X86.cpp
index f00d435937b92..0c72229623eb1 100644
--- a/clang/lib/Basic/Targets/X86.cpp
+++ b/clang/lib/Basic/Targets/X86.cpp
@@ -1363,11 +1363,9 @@ void X86TargetInfo::getCPUSpecificCPUDispatchFeatures(
// rather than the full range of cpus.
bool X86TargetInfo::validateCpuIs(StringRef FeatureStr) const {
return llvm::StringSwitch<bool>(FeatureStr)
-#define X86_VENDOR(ENUM, STRING) .Case(STRING, true)
-#define X86_CPU_TYPE_ALIAS(ENUM, ALIAS) .Case(ALIAS, true)
-#define X86_CPU_TYPE(ENUM, STR) .Case(STR, true)
-#define X86_CPU_SUBTYPE_ALIAS(ENUM, ALIAS) .Case(ALIAS, true)
-#define X86_CPU_SUBTYPE(ENUM, STR) .Case(STR, true)
+#define X86_VENDOR(ENUM, STRING, ABI_VALUE) .Case(STRING, true)
+#define X86_CPU_TYPE(ENUM, STR, ABI_VALUE) .Case(STR, true)
+#define X86_CPU_SUBTYPE(ENUM, STR, ABI_VALUE) .Case(STR, true)
#include "llvm/TargetParser/X86TargetParser.def"
.Default(false);
}
diff --git a/clang/lib/CodeGen/TargetBuiltins/X86.cpp b/clang/lib/CodeGen/TargetBuiltins/X86.cpp
index be2b7d442645e..df63c1ce7b613 100644
--- a/clang/lib/CodeGen/TargetBuiltins/X86.cpp
+++ b/clang/lib/CodeGen/TargetBuiltins/X86.cpp
@@ -628,18 +628,14 @@ Value *CodeGenFunction::EmitX86CpuIs(StringRef CPUStr) {
cast<llvm::GlobalValue>(CpuModel)->setDSOLocal(true);
// Calculate the index needed to access the correct field based on the
- // range. Also adjust the expected value.
+ // range. ABI_VALUE matches with compiler-rt/libgcc values.
auto [Index, Value] = StringSwitch<std::pair<unsigned, unsigned>>(CPUStr)
-#define X86_VENDOR(ENUM, STRING) \
- .Case(STRING, {0u, static_cast<unsigned>(llvm::X86::ENUM)})
-#define X86_CPU_TYPE_ALIAS(ENUM, ALIAS) \
- .Case(ALIAS, {1u, static_cast<unsigned>(llvm::X86::ENUM)})
-#define X86_CPU_TYPE(ENUM, STR) \
- .Case(STR, {1u, static_cast<unsigned>(llvm::X86::ENUM)})
-#define X86_CPU_SUBTYPE_ALIAS(ENUM, ALIAS) \
- .Case(ALIAS, {2u, static_cast<unsigned>(llvm::X86::ENUM)})
-#define X86_CPU_SUBTYPE(ENUM, STR) \
- .Case(STR, {2u, static_cast<unsigned>(llvm::X86::ENUM)})
+#define X86_VENDOR(ENUM, STRING, ABI_VALUE) \
+ .Case(STRING, {0u, ABI_VALUE})
+#define X86_CPU_TYPE(ENUM, STR, ABI_VALUE) \
+ .Case(STR, {1u, ABI_VALUE})
+#define X86_CPU_SUBTYPE(ENUM, STR, ABI_VALUE) \
+ .Case(STR, {2u, ABI_VALUE})
#include "llvm/TargetParser/X86TargetParser.def"
.Default({0, 0});
assert(Value != 0 && "Invalid CPUStr passed to CpuIs");
diff --git a/compiler-rt/lib/builtins/cpu_model/x86.c b/compiler-rt/lib/builtins/cpu_model/x86.c
index 8b352cfe568d0..f52561a36622b 100644
--- a/compiler-rt/lib/builtins/cpu_model/x86.c
+++ b/compiler-rt/lib/builtins/cpu_model/x86.c
@@ -41,7 +41,8 @@ enum VendorSignatures {
enum ProcessorVendors {
VENDOR_INTEL = 1,
VENDOR_AMD,
- VENDOR_OTHER,
+ // VENDOR_ZHAOXIN
+ VENDOR_OTHER = 4,
VENDOR_MAX
};
@@ -104,8 +105,10 @@ enum ProcessorSubtypes {
INTEL_COREI7_ARROWLAKE,
INTEL_COREI7_ARROWLAKE_S,
INTEL_COREI7_PANTHERLAKE,
- AMDFAM1AH_ZNVER5,
- INTEL_COREI7_DIAMONDRAPIDS,
+ // ZHAOXIN_FAM7H_YONGFENG
+ AMDFAM1AH_ZNVER5 = 36,
+ // ZHAOXIN_FAM7H_SHIJIDADAO
+ INTEL_COREI7_DIAMONDRAPIDS = 38,
INTEL_COREI7_NOVALAKE,
CPU_SUBTYPE_MAX
};
diff --git a/llvm/include/llvm/TargetParser/X86TargetParser.def b/llvm/include/llvm/TargetParser/X86TargetParser.def
index 09592bcea27f4..f1b2898128e07 100644
--- a/llvm/include/llvm/TargetParser/X86TargetParser.def
+++ b/llvm/include/llvm/TargetParser/X86TargetParser.def
@@ -12,121 +12,112 @@
// NOTE: NO INCLUDE GUARD DESIRED!
+// ABI_VALUE is used throughout the file by compiler frontend to match values
+// in compiler-rt/libgcc.
+
#ifndef X86_VENDOR
-#define X86_VENDOR(ENUM, STR)
+#define X86_VENDOR(ENUM, STR, ABI_VALUE)
#endif
-X86_VENDOR(VENDOR_INTEL, "intel")
-X86_VENDOR(VENDOR_AMD, "amd")
+X86_VENDOR(VENDOR_INTEL, "intel", 1)
+X86_VENDOR(VENDOR_AMD, "amd", 2)
+X86_VENDOR(VENDOR_OTHER, "other", 4)
#undef X86_VENDOR
-// This macro is used for cpu types present in compiler-rt/libgcc.
#ifndef X86_CPU_TYPE
-#define X86_CPU_TYPE(ENUM, STR)
-#endif
-
-#ifndef X86_CPU_TYPE_ALIAS
-#define X86_CPU_TYPE_ALIAS(ENUM, STR)
+#define X86_CPU_TYPE(ENUM, STR, ABI_VALUE)
#endif
// This list must match what is implemented in libgcc and compilert-rt. Clang
// uses this to know how to implement __builtin_cpu_is.
-X86_CPU_TYPE(INTEL_BONNELL, "bonnell")
-X86_CPU_TYPE(INTEL_CORE2, "core2")
-X86_CPU_TYPE(INTEL_COREI7, "corei7")
-X86_CPU_TYPE(AMDFAM10H, "amdfam10h")
-X86_CPU_TYPE(AMDFAM15H, "amdfam15h")
-X86_CPU_TYPE(INTEL_SILVERMONT, "silvermont")
-X86_CPU_TYPE(INTEL_KNL, "knl")
-X86_CPU_TYPE(AMD_BTVER1, "btver1")
-X86_CPU_TYPE(AMD_BTVER2, "btver2")
-X86_CPU_TYPE(AMDFAM17H, "amdfam17h")
-X86_CPU_TYPE(INTEL_KNM, "knm")
-X86_CPU_TYPE(INTEL_GOLDMONT, "goldmont")
-X86_CPU_TYPE(INTEL_GOLDMONT_PLUS, "goldmont-plus")
-X86_CPU_TYPE(INTEL_TREMONT, "tremont")
-X86_CPU_TYPE(AMDFAM19H, "amdfam19h")
-X86_CPU_TYPE(ZHAOXIN_FAM7H, "zhaoxin_fam7h")
-X86_CPU_TYPE(INTEL_SIERRAFOREST, "sierraforest")
-X86_CPU_TYPE(INTEL_GRANDRIDGE, "grandridge")
-X86_CPU_TYPE(INTEL_CLEARWATERFOREST, "clearwaterforest")
-X86_CPU_TYPE(AMDFAM1AH, "amdfam1ah")
+X86_CPU_TYPE(INTEL_BONNELL, "bonnell", 1)
+X86_CPU_TYPE(INTEL_CORE2, "core2", 2)
+X86_CPU_TYPE(INTEL_COREI7, "corei7", 3)
+X86_CPU_TYPE(AMDFAM10H, "amdfam10h", 4)
+X86_CPU_TYPE(AMDFAM15H, "amdfam15h", 5)
+X86_CPU_TYPE(INTEL_SILVERMONT, "silvermont", 6)
+X86_CPU_TYPE(INTEL_KNL, "knl", 7)
+X86_CPU_TYPE(AMD_BTVER1, "btver1", 8)
+X86_CPU_TYPE(AMD_BTVER2, "btver2", 9)
+X86_CPU_TYPE(AMDFAM17H, "amdfam17h", 10)
+X86_CPU_TYPE(INTEL_KNM, "knm", 11)
+X86_CPU_TYPE(INTEL_GOLDMONT, "goldmont", 12)
+X86_CPU_TYPE(INTEL_GOLDMONT_PLUS, "goldmont-plus", 13)
+X86_CPU_TYPE(INTEL_TREMONT, "tremont", 14)
+X86_CPU_TYPE(AMDFAM19H, "amdfam19h", 15)
+X86_CPU_TYPE(ZHAOXIN_FAM7H, "zhaoxin_fam7h", 16)
+X86_CPU_TYPE(INTEL_SIERRAFOREST, "sierraforest", 17)
+X86_CPU_TYPE(INTEL_GRANDRIDGE, "grandridge", 18)
+X86_CPU_TYPE(INTEL_CLEARWATERFOREST, "clearwaterforest", 19)
+X86_CPU_TYPE(AMDFAM1AH, "amdfam1ah", 20)
-// Alternate names supported by __builtin_cpu_is and target multiversioning.
-X86_CPU_TYPE_ALIAS(INTEL_BONNELL, "atom")
-X86_CPU_TYPE_ALIAS(AMDFAM10H, "amdfam10")
-X86_CPU_TYPE_ALIAS(AMDFAM15H, "amdfam15")
-X86_CPU_TYPE_ALIAS(AMDFAM1AH, "amdfam1a")
-X86_CPU_TYPE_ALIAS(INTEL_SILVERMONT, "slm")
+// Aliases -- a different name for the same cpu, represented as having the same
+// ABI_VALUE.
+X86_CPU_TYPE(ATOM, "atom", 1)
+X86_CPU_TYPE(AMDFAM10, "amdfam10", 4)
+X86_CPU_TYPE(AMDFAM15, "amdfam15", 5)
+X86_CPU_TYPE(AMDFAM1A, "amdfam1a", 20)
+X86_CPU_TYPE(SLM, "slm", 6)
-#undef X86_CPU_TYPE_ALIAS
#undef X86_CPU_TYPE
// This macro is used for cpu subtypes present in compiler-rt/libgcc.
#ifndef X86_CPU_SUBTYPE
-#define X86_CPU_SUBTYPE(ENUM, STR)
-#endif
-
-#ifndef X86_CPU_SUBTYPE_ALIAS
-#define X86_CPU_SUBTYPE_ALIAS(ENUM, STR)
+#define X86_CPU_SUBTYPE(ENUM, STR, ABI_VALUE)
#endif
// This list must match what is implemented in libgcc and compilert-rt. Clang
// uses this to know how to implement __builtin_cpu_is.
-X86_CPU_SUBTYPE(INTEL_COREI7_NEHALEM, "nehalem")
-X86_CPU_SUBTYPE(INTEL_COREI7_WESTMERE, "westmere")
-X86_CPU_SUBTYPE(INTEL_COREI7_SANDYBRIDGE, "sandybridge")
-X86_CPU_SUBTYPE(AMDFAM10H_BARCELONA, "barcelona")
-X86_CPU_SUBTYPE(AMDFAM10H_SHANGHAI, "shanghai")
-X86_CPU_SUBTYPE(AMDFAM10H_ISTANBUL, "istanbul")
-X86_CPU_SUBTYPE(AMDFAM15H_BDVER1, "bdver1")
-X86_CPU_SUBTYPE(AMDFAM15H_BDVER2, "bdver2")
-X86_CPU_SUBTYPE(AMDFAM15H_BDVER3, "bdver3")
-X86_CPU_SUBTYPE(AMDFAM15H_BDVER4, "bdver4")
-X86_CPU_SUBTYPE(AMDFAM17H_ZNVER1, "znver1")
-X86_CPU_SUBTYPE(INTEL_COREI7_IVYBRIDGE, "ivybridge")
-X86_CPU_SUBTYPE(INTEL_COREI7_HASWELL, "haswell")
-X86_CPU_SUBTYPE(INTEL_COREI7_BROADWELL, "broadwell")
-X86_CPU_SUBTYPE(INTEL_COREI7_SKYLAKE, "skylake")
-X86_CPU_SUBTYPE(INTEL_COREI7_SKYLAKE_AVX512, "skylake-avx512")
-X86_CPU_SUBTYPE(INTEL_COREI7_CANNONLAKE, "cannonlake")
-X86_CPU_SUBTYPE(INTEL_COREI7_ICELAKE_CLIENT, "icelake-client")
-X86_CPU_SUBTYPE(INTEL_COREI7_ICELAKE_SERVER, "icelake-server")
-X86_CPU_SUBTYPE(AMDFAM17H_ZNVER2, "znver2")
-X86_CPU_SUBTYPE(INTEL_COREI7_CASCADELAKE, "cascadelake")
-X86_CPU_SUBTYPE(INTEL_COREI7_TIGERLAKE, "tigerlake")
-X86_CPU_SUBTYPE(INTEL_COREI7_COOPERLAKE, "cooperlake")
-X86_CPU_SUBTYPE(INTEL_COREI7_SAPPHIRERAPIDS, "sapphirerapids")
-X86_CPU_SUBTYPE(INTEL_COREI7_ALDERLAKE, "alderlake")
-X86_CPU_SUBTYPE(AMDFAM19H_ZNVER3, "znver3")
-X86_CPU_SUBTYPE(INTEL_COREI7_ROCKETLAKE, "rocketlake")
-X86_CPU_SUBTYPE(ZHAOXIN_FAM7H_LUJIAZUI, "zhaoxin_fam7h_lujiazui")
-X86_CPU_SUBTYPE(AMDFAM19H_ZNVER4, "znver4")
-X86_CPU_SUBTYPE(INTEL_COREI7_GRANITERAPIDS, "graniterapids")
-X86_CPU_SUBTYPE(INTEL_COREI7_GRANITERAPIDS_D,"graniterapids-d")
-X86_CPU_SUBTYPE(INTEL_COREI7_ARROWLAKE, "arrowlake")
-X86_CPU_SUBTYPE(INTEL_COREI7_ARROWLAKE_S, "arrowlake-s")
-X86_CPU_SUBTYPE(INTEL_COREI7_PANTHERLAKE, "pantherlake")
-X86_CPU_SUBTYPE(AMDFAM1AH_ZNVER5, "znver5")
-X86_CPU_SUBTYPE(INTEL_COREI7_DIAMONDRAPIDS, "diamondrapids")
-X86_CPU_SUBTYPE(INTEL_COREI7_NOVALAKE, "novalake")
+X86_CPU_SUBTYPE(INTEL_COREI7_NEHALEM, "nehalem", 1)
+X86_CPU_SUBTYPE(INTEL_COREI7_WESTMERE, "westmere", 2)
+X86_CPU_SUBTYPE(INTEL_COREI7_SANDYBRIDGE, "sandybridge", 3)
+X86_CPU_SUBTYPE(AMDFAM10H_BARCELONA, "barcelona", 4)
+X86_CPU_SUBTYPE(AMDFAM10H_SHANGHAI, "shanghai", 5)
+X86_CPU_SUBTYPE(AMDFAM10H_ISTANBUL, "istanbul", 6)
+X86_CPU_SUBTYPE(AMDFAM15H_BDVER1, "bdver1", 7)
+X86_CPU_SUBTYPE(AMDFAM15H_BDVER2, "bdver2", 8)
+X86_CPU_SUBTYPE(AMDFAM15H_BDVER3, "bdver3", 9)
+X86_CPU_SUBTYPE(AMDFAM15H_BDVER4, "bdver4", 10)
+X86_CPU_SUBTYPE(AMDFAM17H_ZNVER1, "znver1", 11)
+X86_CPU_SUBTYPE(INTEL_COREI7_IVYBRIDGE, "ivybridge", 12)
+X86_CPU_SUBTYPE(INTEL_COREI7_HASWELL, "haswell", 13)
+X86_CPU_SUBTYPE(INTEL_COREI7_BROADWELL, "broadwell", 14)
+X86_CPU_SUBTYPE(INTEL_COREI7_SKYLAKE, "skylake", 15)
+X86_CPU_SUBTYPE(INTEL_COREI7_SKYLAKE_AVX512, "skylake-avx512", 16)
+X86_CPU_SUBTYPE(INTEL_COREI7_CANNONLAKE, "cannonlake", 17)
+X86_CPU_SUBTYPE(INTEL_COREI7_ICELAKE_CLIENT, "icelake-client", 18)
+X86_CPU_SUBTYPE(INTEL_COREI7_ICELAKE_SERVER, "icelake-server", 19)
+X86_CPU_SUBTYPE(AMDFAM17H_ZNVER2, "znver2", 20)
+X86_CPU_SUBTYPE(INTEL_COREI7_CASCADELAKE, "cascadelake", 21)
+X86_CPU_SUBTYPE(INTEL_COREI7_TIGERLAKE, "tigerlake", 22)
+X86_CPU_SUBTYPE(INTEL_COREI7_COOPERLAKE, "cooperlake", 23)
+X86_CPU_SUBTYPE(INTEL_COREI7_SAPPHIRERAPIDS, "sapphirerapids", 24)
+X86_CPU_SUBTYPE(INTEL_COREI7_ALDERLAKE, "alderlake", 25)
+X86_CPU_SUBTYPE(AMDFAM19H_ZNVER3, "znver3", 26)
+X86_CPU_SUBTYPE(INTEL_COREI7_ROCKETLAKE, "rocketlake", 27)
+X86_CPU_SUBTYPE(ZHAOXIN_FAM7H_LUJIAZUI, "zhaoxin_fam7h_lujiazui", 28)
+X86_CPU_SUBTYPE(AMDFAM19H_ZNVER4, "znver4", 29)
+X86_CPU_SUBTYPE(INTEL_COREI7_GRANITERAPIDS, "graniterapids", 30)
+X86_CPU_SUBTYPE(INTEL_COREI7_GRANITERAPIDS_D,"graniterapids-d", 31)
+X86_CPU_SUBTYPE(INTEL_COREI7_ARROWLAKE, "arrowlake", 32)
+X86_CPU_SUBTYPE(INTEL_COREI7_ARROWLAKE_S, "arrowlake-s", 33)
+X86_CPU_SUBTYPE(INTEL_COREI7_PANTHERLAKE, "pantherlake", 34)
+X86_CPU_SUBTYPE(AMDFAM1AH_ZNVER5, "znver5", 36)
+X86_CPU_SUBTYPE(INTEL_COREI7_DIAMONDRAPIDS, "diamondrapids", 38)
+X86_CPU_SUBTYPE(INTEL_COREI7_NOVALAKE, "novalake", 39)
-// Alternate names supported by __builtin_cpu_is and target multiversioning.
-X86_CPU_SUBTYPE_ALIAS(INTEL_COREI7_ALDERLAKE, "raptorlake")
-X86_CPU_SUBTYPE_ALIAS(INTEL_COREI7_ALDERLAKE, "meteorlake")
-X86_CPU_SUBTYPE_ALIAS(INTEL_COREI7_SAPPHIRERAPIDS, "emeraldrapids")
-X86_CPU_SUBTYPE_ALIAS(INTEL_COREI7_ARROWLAKE_S,"lunarlake")
-X86_CPU_SUBTYPE_ALIAS(INTEL_COREI7_ALDERLAKE, "gracemont")
-X86_CPU_SUBTYPE_ALIAS(INTEL_COREI7_PANTHERLAKE, "wildcatlake")
+// Aliases
+X86_CPU_SUBTYPE(INTEL_COREI7_RAPTORLAKE, "raptorlake", 25)
+X86_CPU_SUBTYPE(INTEL_COREI7_METEORLAKE, "meteorlake", 25)
+X86_CPU_SUBTYPE(INTEL_COREI7_EMERALRAPIDS, "emeraldrapids", 24)
+X86_CPU_SUBTYPE(INTEL_COREI7_LUNARLAKE, "lunarlake", 33)
+X86_CPU_SUBTYPE(INTEL_COREI7_GRACEMONT, "gracemont", 25)
+X86_CPU_SUBTYPE(INTEL_COREI7_WILDCATLAKE, "wildcatlake", 34)
-#undef X86_CPU_SUBTYPE_ALIAS
#undef X86_CPU_SUBTYPE
// X86_FEATURE_COMPAT is used for cpu types present in compiler-rt/libgcc (i.e.
// types we can multiversion on). The third parameter PRIORITY is required
// by the attribute 'target' checking.
-
-// Order of bits has to match what's implemented in compiler-rt/libgcc. That's what the
-// ABI_VALUE is for - CodeGenFunction::GetX86CpuSupportsMask uses it.
#ifndef X86_FEATURE_COMPAT
#define X86_FEATURE_COMPAT(ENUM, STR, PRIORITY, ABI_VALUE) X86_FEATURE(ENUM, STR)
#endif
@@ -275,7 +266,7 @@ X86_FEATURE (RETPOLINE_INDIRECT_CALLS, "retpoline-indirect-calls")
X86_FEATURE (LVI_CFI, "lvi-cfi")
X86_FEATURE (LVI_LOAD_HARDENING, "lvi-load-hardening")
-// Max number of priorities. Priorities form a consecutive range
+// Max number of priorities. Priorities form a consecutive range.
#define MAX_PRIORITY 35
#undef X86_FEATURE_COMPAT
diff --git a/llvm/include/llvm/TargetParser/X86TargetParser.h b/llvm/include/llvm/TargetParser/X86TargetParser.h
index 46061f9d1fc7d..d698592a86a56 100644
--- a/llvm/include/llvm/TargetParser/X86TargetParser.h
+++ b/llvm/include/llvm/TargetParser/X86TargetParser.h
@@ -24,38 +24,24 @@ class StringRef;
namespace X86 {
-// This should be kept in sync with libcc/compiler-rt as its included by clang
-// as a proxy for what's in libgcc/compiler-rt.
enum ProcessorVendors : unsigned {
- VENDOR_DUMMY,
-#define X86_VENDOR(ENUM, STRING) \
- ENUM,
+#define X86_VENDOR(ENUM, STRING, ABI_VALUE) ENUM,
#include "llvm/TargetParser/X86TargetParser.def"
- VENDOR_OTHER
+ CPU_VENDOR_MAX
};
-// This should be kept in sync with libcc/compiler-rt as its included by clang
-// as a proxy for what's in libgcc/compiler-rt.
enum ProcessorTypes : unsigned {
- CPU_TYPE_DUMMY,
-#define X86_CPU_TYPE(ENUM, STRING) \
- ENUM,
+#define X86_CPU_TYPE(ENUM, STRING, ABI_VALUE) ENUM,
#include "llvm/TargetParser/X86TargetParser.def"
CPU_TYPE_MAX
};
-// This should be kept in sync with libcc/compiler-rt as its included by clang
-// as a proxy for what's in libgcc/compiler-rt.
enum ProcessorSubtypes : unsigned {
- CPU_SUBTYPE_DUMMY,
-#define X86_CPU_SUBTYPE(ENUM, STRING) \
- ENUM,
+#define X86_CPU_SUBTYPE(ENUM, STRING, ABI_VALUE) ENUM,
#include "llvm/TargetParser/X86TargetParser.def"
CPU_SUBTYPE_MAX
};
-// This should be kept in sync with libcc/compiler-rt as it should be used
-// by clang as a proxy for what's in libgcc/compiler-rt.
enum ProcessorFeatures {
#define X86_FEATURE(ENUM, STRING) FEATURE_##ENUM,
#include "llvm/TargetParser/X86TargetParser.def"
diff --git a/llvm/lib/TargetParser/X86TargetParser.cpp b/llvm/lib/TargetParser/X86TargetParser.cpp
index 2810849e4af9e..c3365da6b0136 100644
--- a/llvm/lib/TargetParser/X86TargetParser.cpp
+++ b/llvm/lib/TargetParser/X86TargetParser.cpp
@@ -762,9 +762,9 @@ llvm::X86::getCpuSupportsMask(ArrayRef<StringRef> FeatureStrs) {
std::array<uint32_t, 4> FeatureMask{};
for (StringRef FeatureStr : FeatureStrs) {
unsigned Feature = StringSwitch<unsigned>(FeatureStr)
+ // ABI_VALUE is used to match values in compiler-rt/libgcc
#define X86_FEATURE_COMPAT(ENUM, STR, PRIORITY, ABI_VALUE) .Case(STR, ABI_VALUE)
-#define X86_MICROARCH_LEVEL(ENUM, STR, PRIORITY, ABI_VALUE) \
- .Case(STR, ABI_VALUE)
+#define X86_MICROARCH_LEVEL(ENUM, STR, PRIORITY, ABI_VALUE) .Case(STR, ABI_VALUE)
#include "llvm/TargetParser/X86TargetParser.def"
;
assert(Feature / 32 < FeatureMask.size());
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@llvm/pr-subscribers-backend-x86 Author: Mikołaj Piróg (mikolaj-pirog) ChangesThis is a continuation of previous PR: #168750 compiler-rt was synced with libgcc on ProcessorVendor and ProcessorSubtype fields and so was llvm. Cpu type, subtype and vendor entries in X86TargetParser.def were refactored to use ABI_VALUE. LLVM doesn't set the ABI_VALUE for its enums -- clang now takes care of that by reading the ABI_VALUE. I've removed and added some comments to better explain what is going on. 6 Files Affected:
diff --git a/clang/lib/Basic/Targets/X86.cpp b/clang/lib/Basic/Targets/X86.cpp
index f00d435937b92..0c72229623eb1 100644
--- a/clang/lib/Basic/Targets/X86.cpp
+++ b/clang/lib/Basic/Targets/X86.cpp
@@ -1363,11 +1363,9 @@ void X86TargetInfo::getCPUSpecificCPUDispatchFeatures(
// rather than the full range of cpus.
bool X86TargetInfo::validateCpuIs(StringRef FeatureStr) const {
return llvm::StringSwitch<bool>(FeatureStr)
-#define X86_VENDOR(ENUM, STRING) .Case(STRING, true)
-#define X86_CPU_TYPE_ALIAS(ENUM, ALIAS) .Case(ALIAS, true)
-#define X86_CPU_TYPE(ENUM, STR) .Case(STR, true)
-#define X86_CPU_SUBTYPE_ALIAS(ENUM, ALIAS) .Case(ALIAS, true)
-#define X86_CPU_SUBTYPE(ENUM, STR) .Case(STR, true)
+#define X86_VENDOR(ENUM, STRING, ABI_VALUE) .Case(STRING, true)
+#define X86_CPU_TYPE(ENUM, STR, ABI_VALUE) .Case(STR, true)
+#define X86_CPU_SUBTYPE(ENUM, STR, ABI_VALUE) .Case(STR, true)
#include "llvm/TargetParser/X86TargetParser.def"
.Default(false);
}
diff --git a/clang/lib/CodeGen/TargetBuiltins/X86.cpp b/clang/lib/CodeGen/TargetBuiltins/X86.cpp
index be2b7d442645e..df63c1ce7b613 100644
--- a/clang/lib/CodeGen/TargetBuiltins/X86.cpp
+++ b/clang/lib/CodeGen/TargetBuiltins/X86.cpp
@@ -628,18 +628,14 @@ Value *CodeGenFunction::EmitX86CpuIs(StringRef CPUStr) {
cast<llvm::GlobalValue>(CpuModel)->setDSOLocal(true);
// Calculate the index needed to access the correct field based on the
- // range. Also adjust the expected value.
+ // range. ABI_VALUE matches with compiler-rt/libgcc values.
auto [Index, Value] = StringSwitch<std::pair<unsigned, unsigned>>(CPUStr)
-#define X86_VENDOR(ENUM, STRING) \
- .Case(STRING, {0u, static_cast<unsigned>(llvm::X86::ENUM)})
-#define X86_CPU_TYPE_ALIAS(ENUM, ALIAS) \
- .Case(ALIAS, {1u, static_cast<unsigned>(llvm::X86::ENUM)})
-#define X86_CPU_TYPE(ENUM, STR) \
- .Case(STR, {1u, static_cast<unsigned>(llvm::X86::ENUM)})
-#define X86_CPU_SUBTYPE_ALIAS(ENUM, ALIAS) \
- .Case(ALIAS, {2u, static_cast<unsigned>(llvm::X86::ENUM)})
-#define X86_CPU_SUBTYPE(ENUM, STR) \
- .Case(STR, {2u, static_cast<unsigned>(llvm::X86::ENUM)})
+#define X86_VENDOR(ENUM, STRING, ABI_VALUE) \
+ .Case(STRING, {0u, ABI_VALUE})
+#define X86_CPU_TYPE(ENUM, STR, ABI_VALUE) \
+ .Case(STR, {1u, ABI_VALUE})
+#define X86_CPU_SUBTYPE(ENUM, STR, ABI_VALUE) \
+ .Case(STR, {2u, ABI_VALUE})
#include "llvm/TargetParser/X86TargetParser.def"
.Default({0, 0});
assert(Value != 0 && "Invalid CPUStr passed to CpuIs");
diff --git a/compiler-rt/lib/builtins/cpu_model/x86.c b/compiler-rt/lib/builtins/cpu_model/x86.c
index 8b352cfe568d0..f52561a36622b 100644
--- a/compiler-rt/lib/builtins/cpu_model/x86.c
+++ b/compiler-rt/lib/builtins/cpu_model/x86.c
@@ -41,7 +41,8 @@ enum VendorSignatures {
enum ProcessorVendors {
VENDOR_INTEL = 1,
VENDOR_AMD,
- VENDOR_OTHER,
+ // VENDOR_ZHAOXIN
+ VENDOR_OTHER = 4,
VENDOR_MAX
};
@@ -104,8 +105,10 @@ enum ProcessorSubtypes {
INTEL_COREI7_ARROWLAKE,
INTEL_COREI7_ARROWLAKE_S,
INTEL_COREI7_PANTHERLAKE,
- AMDFAM1AH_ZNVER5,
- INTEL_COREI7_DIAMONDRAPIDS,
+ // ZHAOXIN_FAM7H_YONGFENG
+ AMDFAM1AH_ZNVER5 = 36,
+ // ZHAOXIN_FAM7H_SHIJIDADAO
+ INTEL_COREI7_DIAMONDRAPIDS = 38,
INTEL_COREI7_NOVALAKE,
CPU_SUBTYPE_MAX
};
diff --git a/llvm/include/llvm/TargetParser/X86TargetParser.def b/llvm/include/llvm/TargetParser/X86TargetParser.def
index 09592bcea27f4..f1b2898128e07 100644
--- a/llvm/include/llvm/TargetParser/X86TargetParser.def
+++ b/llvm/include/llvm/TargetParser/X86TargetParser.def
@@ -12,121 +12,112 @@
// NOTE: NO INCLUDE GUARD DESIRED!
+// ABI_VALUE is used throughout the file by compiler frontend to match values
+// in compiler-rt/libgcc.
+
#ifndef X86_VENDOR
-#define X86_VENDOR(ENUM, STR)
+#define X86_VENDOR(ENUM, STR, ABI_VALUE)
#endif
-X86_VENDOR(VENDOR_INTEL, "intel")
-X86_VENDOR(VENDOR_AMD, "amd")
+X86_VENDOR(VENDOR_INTEL, "intel", 1)
+X86_VENDOR(VENDOR_AMD, "amd", 2)
+X86_VENDOR(VENDOR_OTHER, "other", 4)
#undef X86_VENDOR
-// This macro is used for cpu types present in compiler-rt/libgcc.
#ifndef X86_CPU_TYPE
-#define X86_CPU_TYPE(ENUM, STR)
-#endif
-
-#ifndef X86_CPU_TYPE_ALIAS
-#define X86_CPU_TYPE_ALIAS(ENUM, STR)
+#define X86_CPU_TYPE(ENUM, STR, ABI_VALUE)
#endif
// This list must match what is implemented in libgcc and compilert-rt. Clang
// uses this to know how to implement __builtin_cpu_is.
-X86_CPU_TYPE(INTEL_BONNELL, "bonnell")
-X86_CPU_TYPE(INTEL_CORE2, "core2")
-X86_CPU_TYPE(INTEL_COREI7, "corei7")
-X86_CPU_TYPE(AMDFAM10H, "amdfam10h")
-X86_CPU_TYPE(AMDFAM15H, "amdfam15h")
-X86_CPU_TYPE(INTEL_SILVERMONT, "silvermont")
-X86_CPU_TYPE(INTEL_KNL, "knl")
-X86_CPU_TYPE(AMD_BTVER1, "btver1")
-X86_CPU_TYPE(AMD_BTVER2, "btver2")
-X86_CPU_TYPE(AMDFAM17H, "amdfam17h")
-X86_CPU_TYPE(INTEL_KNM, "knm")
-X86_CPU_TYPE(INTEL_GOLDMONT, "goldmont")
-X86_CPU_TYPE(INTEL_GOLDMONT_PLUS, "goldmont-plus")
-X86_CPU_TYPE(INTEL_TREMONT, "tremont")
-X86_CPU_TYPE(AMDFAM19H, "amdfam19h")
-X86_CPU_TYPE(ZHAOXIN_FAM7H, "zhaoxin_fam7h")
-X86_CPU_TYPE(INTEL_SIERRAFOREST, "sierraforest")
-X86_CPU_TYPE(INTEL_GRANDRIDGE, "grandridge")
-X86_CPU_TYPE(INTEL_CLEARWATERFOREST, "clearwaterforest")
-X86_CPU_TYPE(AMDFAM1AH, "amdfam1ah")
+X86_CPU_TYPE(INTEL_BONNELL, "bonnell", 1)
+X86_CPU_TYPE(INTEL_CORE2, "core2", 2)
+X86_CPU_TYPE(INTEL_COREI7, "corei7", 3)
+X86_CPU_TYPE(AMDFAM10H, "amdfam10h", 4)
+X86_CPU_TYPE(AMDFAM15H, "amdfam15h", 5)
+X86_CPU_TYPE(INTEL_SILVERMONT, "silvermont", 6)
+X86_CPU_TYPE(INTEL_KNL, "knl", 7)
+X86_CPU_TYPE(AMD_BTVER1, "btver1", 8)
+X86_CPU_TYPE(AMD_BTVER2, "btver2", 9)
+X86_CPU_TYPE(AMDFAM17H, "amdfam17h", 10)
+X86_CPU_TYPE(INTEL_KNM, "knm", 11)
+X86_CPU_TYPE(INTEL_GOLDMONT, "goldmont", 12)
+X86_CPU_TYPE(INTEL_GOLDMONT_PLUS, "goldmont-plus", 13)
+X86_CPU_TYPE(INTEL_TREMONT, "tremont", 14)
+X86_CPU_TYPE(AMDFAM19H, "amdfam19h", 15)
+X86_CPU_TYPE(ZHAOXIN_FAM7H, "zhaoxin_fam7h", 16)
+X86_CPU_TYPE(INTEL_SIERRAFOREST, "sierraforest", 17)
+X86_CPU_TYPE(INTEL_GRANDRIDGE, "grandridge", 18)
+X86_CPU_TYPE(INTEL_CLEARWATERFOREST, "clearwaterforest", 19)
+X86_CPU_TYPE(AMDFAM1AH, "amdfam1ah", 20)
-// Alternate names supported by __builtin_cpu_is and target multiversioning.
-X86_CPU_TYPE_ALIAS(INTEL_BONNELL, "atom")
-X86_CPU_TYPE_ALIAS(AMDFAM10H, "amdfam10")
-X86_CPU_TYPE_ALIAS(AMDFAM15H, "amdfam15")
-X86_CPU_TYPE_ALIAS(AMDFAM1AH, "amdfam1a")
-X86_CPU_TYPE_ALIAS(INTEL_SILVERMONT, "slm")
+// Aliases -- a different name for the same cpu, represented as having the same
+// ABI_VALUE.
+X86_CPU_TYPE(ATOM, "atom", 1)
+X86_CPU_TYPE(AMDFAM10, "amdfam10", 4)
+X86_CPU_TYPE(AMDFAM15, "amdfam15", 5)
+X86_CPU_TYPE(AMDFAM1A, "amdfam1a", 20)
+X86_CPU_TYPE(SLM, "slm", 6)
-#undef X86_CPU_TYPE_ALIAS
#undef X86_CPU_TYPE
// This macro is used for cpu subtypes present in compiler-rt/libgcc.
#ifndef X86_CPU_SUBTYPE
-#define X86_CPU_SUBTYPE(ENUM, STR)
-#endif
-
-#ifndef X86_CPU_SUBTYPE_ALIAS
-#define X86_CPU_SUBTYPE_ALIAS(ENUM, STR)
+#define X86_CPU_SUBTYPE(ENUM, STR, ABI_VALUE)
#endif
// This list must match what is implemented in libgcc and compilert-rt. Clang
// uses this to know how to implement __builtin_cpu_is.
-X86_CPU_SUBTYPE(INTEL_COREI7_NEHALEM, "nehalem")
-X86_CPU_SUBTYPE(INTEL_COREI7_WESTMERE, "westmere")
-X86_CPU_SUBTYPE(INTEL_COREI7_SANDYBRIDGE, "sandybridge")
-X86_CPU_SUBTYPE(AMDFAM10H_BARCELONA, "barcelona")
-X86_CPU_SUBTYPE(AMDFAM10H_SHANGHAI, "shanghai")
-X86_CPU_SUBTYPE(AMDFAM10H_ISTANBUL, "istanbul")
-X86_CPU_SUBTYPE(AMDFAM15H_BDVER1, "bdver1")
-X86_CPU_SUBTYPE(AMDFAM15H_BDVER2, "bdver2")
-X86_CPU_SUBTYPE(AMDFAM15H_BDVER3, "bdver3")
-X86_CPU_SUBTYPE(AMDFAM15H_BDVER4, "bdver4")
-X86_CPU_SUBTYPE(AMDFAM17H_ZNVER1, "znver1")
-X86_CPU_SUBTYPE(INTEL_COREI7_IVYBRIDGE, "ivybridge")
-X86_CPU_SUBTYPE(INTEL_COREI7_HASWELL, "haswell")
-X86_CPU_SUBTYPE(INTEL_COREI7_BROADWELL, "broadwell")
-X86_CPU_SUBTYPE(INTEL_COREI7_SKYLAKE, "skylake")
-X86_CPU_SUBTYPE(INTEL_COREI7_SKYLAKE_AVX512, "skylake-avx512")
-X86_CPU_SUBTYPE(INTEL_COREI7_CANNONLAKE, "cannonlake")
-X86_CPU_SUBTYPE(INTEL_COREI7_ICELAKE_CLIENT, "icelake-client")
-X86_CPU_SUBTYPE(INTEL_COREI7_ICELAKE_SERVER, "icelake-server")
-X86_CPU_SUBTYPE(AMDFAM17H_ZNVER2, "znver2")
-X86_CPU_SUBTYPE(INTEL_COREI7_CASCADELAKE, "cascadelake")
-X86_CPU_SUBTYPE(INTEL_COREI7_TIGERLAKE, "tigerlake")
-X86_CPU_SUBTYPE(INTEL_COREI7_COOPERLAKE, "cooperlake")
-X86_CPU_SUBTYPE(INTEL_COREI7_SAPPHIRERAPIDS, "sapphirerapids")
-X86_CPU_SUBTYPE(INTEL_COREI7_ALDERLAKE, "alderlake")
-X86_CPU_SUBTYPE(AMDFAM19H_ZNVER3, "znver3")
-X86_CPU_SUBTYPE(INTEL_COREI7_ROCKETLAKE, "rocketlake")
-X86_CPU_SUBTYPE(ZHAOXIN_FAM7H_LUJIAZUI, "zhaoxin_fam7h_lujiazui")
-X86_CPU_SUBTYPE(AMDFAM19H_ZNVER4, "znver4")
-X86_CPU_SUBTYPE(INTEL_COREI7_GRANITERAPIDS, "graniterapids")
-X86_CPU_SUBTYPE(INTEL_COREI7_GRANITERAPIDS_D,"graniterapids-d")
-X86_CPU_SUBTYPE(INTEL_COREI7_ARROWLAKE, "arrowlake")
-X86_CPU_SUBTYPE(INTEL_COREI7_ARROWLAKE_S, "arrowlake-s")
-X86_CPU_SUBTYPE(INTEL_COREI7_PANTHERLAKE, "pantherlake")
-X86_CPU_SUBTYPE(AMDFAM1AH_ZNVER5, "znver5")
-X86_CPU_SUBTYPE(INTEL_COREI7_DIAMONDRAPIDS, "diamondrapids")
-X86_CPU_SUBTYPE(INTEL_COREI7_NOVALAKE, "novalake")
+X86_CPU_SUBTYPE(INTEL_COREI7_NEHALEM, "nehalem", 1)
+X86_CPU_SUBTYPE(INTEL_COREI7_WESTMERE, "westmere", 2)
+X86_CPU_SUBTYPE(INTEL_COREI7_SANDYBRIDGE, "sandybridge", 3)
+X86_CPU_SUBTYPE(AMDFAM10H_BARCELONA, "barcelona", 4)
+X86_CPU_SUBTYPE(AMDFAM10H_SHANGHAI, "shanghai", 5)
+X86_CPU_SUBTYPE(AMDFAM10H_ISTANBUL, "istanbul", 6)
+X86_CPU_SUBTYPE(AMDFAM15H_BDVER1, "bdver1", 7)
+X86_CPU_SUBTYPE(AMDFAM15H_BDVER2, "bdver2", 8)
+X86_CPU_SUBTYPE(AMDFAM15H_BDVER3, "bdver3", 9)
+X86_CPU_SUBTYPE(AMDFAM15H_BDVER4, "bdver4", 10)
+X86_CPU_SUBTYPE(AMDFAM17H_ZNVER1, "znver1", 11)
+X86_CPU_SUBTYPE(INTEL_COREI7_IVYBRIDGE, "ivybridge", 12)
+X86_CPU_SUBTYPE(INTEL_COREI7_HASWELL, "haswell", 13)
+X86_CPU_SUBTYPE(INTEL_COREI7_BROADWELL, "broadwell", 14)
+X86_CPU_SUBTYPE(INTEL_COREI7_SKYLAKE, "skylake", 15)
+X86_CPU_SUBTYPE(INTEL_COREI7_SKYLAKE_AVX512, "skylake-avx512", 16)
+X86_CPU_SUBTYPE(INTEL_COREI7_CANNONLAKE, "cannonlake", 17)
+X86_CPU_SUBTYPE(INTEL_COREI7_ICELAKE_CLIENT, "icelake-client", 18)
+X86_CPU_SUBTYPE(INTEL_COREI7_ICELAKE_SERVER, "icelake-server", 19)
+X86_CPU_SUBTYPE(AMDFAM17H_ZNVER2, "znver2", 20)
+X86_CPU_SUBTYPE(INTEL_COREI7_CASCADELAKE, "cascadelake", 21)
+X86_CPU_SUBTYPE(INTEL_COREI7_TIGERLAKE, "tigerlake", 22)
+X86_CPU_SUBTYPE(INTEL_COREI7_COOPERLAKE, "cooperlake", 23)
+X86_CPU_SUBTYPE(INTEL_COREI7_SAPPHIRERAPIDS, "sapphirerapids", 24)
+X86_CPU_SUBTYPE(INTEL_COREI7_ALDERLAKE, "alderlake", 25)
+X86_CPU_SUBTYPE(AMDFAM19H_ZNVER3, "znver3", 26)
+X86_CPU_SUBTYPE(INTEL_COREI7_ROCKETLAKE, "rocketlake", 27)
+X86_CPU_SUBTYPE(ZHAOXIN_FAM7H_LUJIAZUI, "zhaoxin_fam7h_lujiazui", 28)
+X86_CPU_SUBTYPE(AMDFAM19H_ZNVER4, "znver4", 29)
+X86_CPU_SUBTYPE(INTEL_COREI7_GRANITERAPIDS, "graniterapids", 30)
+X86_CPU_SUBTYPE(INTEL_COREI7_GRANITERAPIDS_D,"graniterapids-d", 31)
+X86_CPU_SUBTYPE(INTEL_COREI7_ARROWLAKE, "arrowlake", 32)
+X86_CPU_SUBTYPE(INTEL_COREI7_ARROWLAKE_S, "arrowlake-s", 33)
+X86_CPU_SUBTYPE(INTEL_COREI7_PANTHERLAKE, "pantherlake", 34)
+X86_CPU_SUBTYPE(AMDFAM1AH_ZNVER5, "znver5", 36)
+X86_CPU_SUBTYPE(INTEL_COREI7_DIAMONDRAPIDS, "diamondrapids", 38)
+X86_CPU_SUBTYPE(INTEL_COREI7_NOVALAKE, "novalake", 39)
-// Alternate names supported by __builtin_cpu_is and target multiversioning.
-X86_CPU_SUBTYPE_ALIAS(INTEL_COREI7_ALDERLAKE, "raptorlake")
-X86_CPU_SUBTYPE_ALIAS(INTEL_COREI7_ALDERLAKE, "meteorlake")
-X86_CPU_SUBTYPE_ALIAS(INTEL_COREI7_SAPPHIRERAPIDS, "emeraldrapids")
-X86_CPU_SUBTYPE_ALIAS(INTEL_COREI7_ARROWLAKE_S,"lunarlake")
-X86_CPU_SUBTYPE_ALIAS(INTEL_COREI7_ALDERLAKE, "gracemont")
-X86_CPU_SUBTYPE_ALIAS(INTEL_COREI7_PANTHERLAKE, "wildcatlake")
+// Aliases
+X86_CPU_SUBTYPE(INTEL_COREI7_RAPTORLAKE, "raptorlake", 25)
+X86_CPU_SUBTYPE(INTEL_COREI7_METEORLAKE, "meteorlake", 25)
+X86_CPU_SUBTYPE(INTEL_COREI7_EMERALRAPIDS, "emeraldrapids", 24)
+X86_CPU_SUBTYPE(INTEL_COREI7_LUNARLAKE, "lunarlake", 33)
+X86_CPU_SUBTYPE(INTEL_COREI7_GRACEMONT, "gracemont", 25)
+X86_CPU_SUBTYPE(INTEL_COREI7_WILDCATLAKE, "wildcatlake", 34)
-#undef X86_CPU_SUBTYPE_ALIAS
#undef X86_CPU_SUBTYPE
// X86_FEATURE_COMPAT is used for cpu types present in compiler-rt/libgcc (i.e.
// types we can multiversion on). The third parameter PRIORITY is required
// by the attribute 'target' checking.
-
-// Order of bits has to match what's implemented in compiler-rt/libgcc. That's what the
-// ABI_VALUE is for - CodeGenFunction::GetX86CpuSupportsMask uses it.
#ifndef X86_FEATURE_COMPAT
#define X86_FEATURE_COMPAT(ENUM, STR, PRIORITY, ABI_VALUE) X86_FEATURE(ENUM, STR)
#endif
@@ -275,7 +266,7 @@ X86_FEATURE (RETPOLINE_INDIRECT_CALLS, "retpoline-indirect-calls")
X86_FEATURE (LVI_CFI, "lvi-cfi")
X86_FEATURE (LVI_LOAD_HARDENING, "lvi-load-hardening")
-// Max number of priorities. Priorities form a consecutive range
+// Max number of priorities. Priorities form a consecutive range.
#define MAX_PRIORITY 35
#undef X86_FEATURE_COMPAT
diff --git a/llvm/include/llvm/TargetParser/X86TargetParser.h b/llvm/include/llvm/TargetParser/X86TargetParser.h
index 46061f9d1fc7d..d698592a86a56 100644
--- a/llvm/include/llvm/TargetParser/X86TargetParser.h
+++ b/llvm/include/llvm/TargetParser/X86TargetParser.h
@@ -24,38 +24,24 @@ class StringRef;
namespace X86 {
-// This should be kept in sync with libcc/compiler-rt as its included by clang
-// as a proxy for what's in libgcc/compiler-rt.
enum ProcessorVendors : unsigned {
- VENDOR_DUMMY,
-#define X86_VENDOR(ENUM, STRING) \
- ENUM,
+#define X86_VENDOR(ENUM, STRING, ABI_VALUE) ENUM,
#include "llvm/TargetParser/X86TargetParser.def"
- VENDOR_OTHER
+ CPU_VENDOR_MAX
};
-// This should be kept in sync with libcc/compiler-rt as its included by clang
-// as a proxy for what's in libgcc/compiler-rt.
enum ProcessorTypes : unsigned {
- CPU_TYPE_DUMMY,
-#define X86_CPU_TYPE(ENUM, STRING) \
- ENUM,
+#define X86_CPU_TYPE(ENUM, STRING, ABI_VALUE) ENUM,
#include "llvm/TargetParser/X86TargetParser.def"
CPU_TYPE_MAX
};
-// This should be kept in sync with libcc/compiler-rt as its included by clang
-// as a proxy for what's in libgcc/compiler-rt.
enum ProcessorSubtypes : unsigned {
- CPU_SUBTYPE_DUMMY,
-#define X86_CPU_SUBTYPE(ENUM, STRING) \
- ENUM,
+#define X86_CPU_SUBTYPE(ENUM, STRING, ABI_VALUE) ENUM,
#include "llvm/TargetParser/X86TargetParser.def"
CPU_SUBTYPE_MAX
};
-// This should be kept in sync with libcc/compiler-rt as it should be used
-// by clang as a proxy for what's in libgcc/compiler-rt.
enum ProcessorFeatures {
#define X86_FEATURE(ENUM, STRING) FEATURE_##ENUM,
#include "llvm/TargetParser/X86TargetParser.def"
diff --git a/llvm/lib/TargetParser/X86TargetParser.cpp b/llvm/lib/TargetParser/X86TargetParser.cpp
index 2810849e4af9e..c3365da6b0136 100644
--- a/llvm/lib/TargetParser/X86TargetParser.cpp
+++ b/llvm/lib/TargetParser/X86TargetParser.cpp
@@ -762,9 +762,9 @@ llvm::X86::getCpuSupportsMask(ArrayRef<StringRef> FeatureStrs) {
std::array<uint32_t, 4> FeatureMask{};
for (StringRef FeatureStr : FeatureStrs) {
unsigned Feature = StringSwitch<unsigned>(FeatureStr)
+ // ABI_VALUE is used to match values in compiler-rt/libgcc
#define X86_FEATURE_COMPAT(ENUM, STR, PRIORITY, ABI_VALUE) .Case(STR, ABI_VALUE)
-#define X86_MICROARCH_LEVEL(ENUM, STR, PRIORITY, ABI_VALUE) \
- .Case(STR, ABI_VALUE)
+#define X86_MICROARCH_LEVEL(ENUM, STR, PRIORITY, ABI_VALUE) .Case(STR, ABI_VALUE)
#include "llvm/TargetParser/X86TargetParser.def"
;
assert(Feature / 32 < FeatureMask.size());
|
|
✅ With the latest revision this PR passed the C/C++ code formatter. |
Contributor
|
I'm always nervous seeing large changes without testing. Since the target is to match with libgcc, is it possible to verify it with GCC tests. I know llvm-test-suite contains some GCC tests. So it would be good to add them there. And a local verification is still better than none, if adding GCC tests is impossible. |
RKSimon
self-requested a review
February 13, 2026 15:55
Contributor
|
@mikolaj-pirog are you still working on this? |
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Author
Yes -- I aim to get back to this before end of the month. I need to rebase and add some basic test (most likely test that values emitted by clang make sense) |
Member
Author
|
Pinging @RKSimon @phoebewang for review -- I've added some simple testing to make sure the right values are passed, but ideally we would like some runtime testing (though I don't know if it possible..). For now I think it's enough, let me know what you think |
phoebewang
reviewed
Jul 2, 2026
| INTEL_COREI7_NOVALAKE, | ||
| HYGONFAM18H_C86_4G_M4, | ||
| AMDFAM1AH_ZNVER6, | ||
| HYGONFAM18H_C86_4G_M4 = 41, |
phoebewang
reviewed
Jul 2, 2026
| @@ -0,0 +1,963 @@ | |||
| // RUN: %clang_cc1 -triple x86_64-pc-linux-gnu -emit-llvm < %s | FileCheck %s | |||
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IIRC, this patch just changes the order of CPU name, but this test actually tests each single feature which is not touched in the patch?
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Yes, I've decided to do this test for completeness. I can split to another PR, for now I've updated the description
mikolaj-pirog
changed the title
phoebewang
approved these changes
Jul 2, 2026
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The change LGTM, but I didn't check with libgcc.
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|
Pinging @RKSimon -- you've requested changes and I can't cleanly merge without you approving |
RKSimon
reviewed
Jul 6, 2026
| // CHECK-LABEL: define{{.*}} void @test_amx_tf32( | ||
| // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @__cpu_features2, i64 8) | ||
| // CHECK: = and i32 [[LOAD]], 4194304 | ||
| } |
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aren't we about to drop amx-tf32?
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We are, but at the same time it's still there, so it's slightly weird to not include it. I don't have strong preference, I can omit mentions of it here
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whichever gets committed first I guess :) CC @JaydeepChauhan14
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On a second thought, I've removed it, no point in adding a testcase that is going to be removed a few commits later
| } | ||
|
|
||
| // CPU types (field offset 4). | ||
| void test_bonnell(void) { |
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I don't suppose we can handle all these with less duplication using sed or something - so we have a lot of RUN lines that inject the type / subtype into single/fewer tests? Might need to split into a couple of test files (vendor/cputype/subtype)? Sorry for the bikeshedding.....
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Good point, I've reduced the test size and split them into new files
RKSimon
self-requested a review
July 6, 2026 14:49
RKSimon
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Jul 6, 2026
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LGTM - @phoebewang are you OK with the refactor?
🐧 Linux x64 Test Results
✅ The build succeeded and all tests passed. |
phoebewang
reviewed
Jul 7, 2026
| TEST_CPU_IS(amd, "amd") | ||
|
|
||
| // CHECK: = icmp eq i32 {{.*}}, 4 | ||
| TEST_CPU_IS(other, "other") |
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Isn't 4 hygon and 5 other in x86.c?
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Good catch, I've corrected it, 5 is the right value for other
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How did pre-check pass then? This makes my worry the test doesn't work as intended.
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The error was also present in the X86TargetParser.def. The tests don't check if the compiler-rt and llvm agree on the ABI. I don't see how this could be easily accomplished, but I was thinking about making compiler-rt use the X86TargetParser.def directly, that would eliminate a possiblity of compiler-rt and llvm disagreeing
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I see. It's a problem. But I think it's good enough for this patch.
phoebewang
reviewed
Jul 7, 2026
| // CHECK: = icmp eq i32 [[LOAD]], 1 | ||
| TEST_CPU_IS(bonnell, "bonnell") | ||
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| // CHECK: = icmp eq i32 {{.*}}, 2 |
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Given each macro is a function, we should use CHECK-LABEL for each of them. We should also check the load .. __cpu_model to make sure we are reading the correct bit. This applies to the rest tests.
phoebewang
reviewed
Jul 7, 2026
| // CHECK: = icmp eq i32 {{.*}}, 21 | ||
| TEST_CPU_IS(hygonfam18h, "hygonfam18h") | ||
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| // CHECK: = icmp eq i32 {{.*}}, 1 |
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1 again. Is it have a different offset with above?
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At the end the aliases are being tested. I've added a comment saying that they are aliases and I've fixed the ordering among them (also in X86TargetParser.def). This also applies to comments below
phoebewang
reviewed
Jul 7, 2026
| // CHECK: = icmp eq i32 {{.*}}, 5 | ||
| TEST_CPU_IS(amdfam15, "amdfam15") | ||
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| // CHECK: = icmp eq i32 {{.*}}, 20 |
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I assume we are using ascending order in the test, unless they have different offset?
phoebewang
reviewed
Jul 7, 2026
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| // CHECK: = icmp eq i32 {{.*}}, 25 | ||
| TEST_CPU_IS(raptorlake, "raptorlake") | ||
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| // CHECK: = icmp eq i32 {{.*}}, 25 | ||
| TEST_CPU_IS(meteorlake, "meteorlake") | ||
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| // CHECK: = icmp eq i32 {{.*}}, 24 | ||
| TEST_CPU_IS(emeraldrapids, "emeraldrapids") | ||
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| // CHECK: = icmp eq i32 {{.*}}, 33 | ||
| TEST_CPU_IS(lunarlake, "lunarlake") | ||
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| // CHECK: = icmp eq i32 {{.*}}, 25 | ||
| TEST_CPU_IS(gracemont, "gracemont") | ||
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| // CHECK: = icmp eq i32 {{.*}}, 34 | ||
| TEST_CPU_IS(wildcatlake, "wildcatlake") |
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These are a bit odd not placed in order.
aobolensk
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Jul 8, 2026
…tor internal cpu type tables in LLVM (llvm#171172) This is a continuation of previous PR: llvm#168750 compiler-rt was synced with libgcc on ProcessorVendor and ProcessorSubtype fields and so was llvm. Cpu type, subtype and vendor entries in X86TargetParser.def were refactored to use ABI_VALUE. LLVM doesn't set the ABI_VALUE for its enums -- clang now takes care of that by reading the ABI_VALUE. I've removed and added some comments to better explain what is going on. While at it, I've added tests to check that right values are passed for vendor, subtypes, types and features (the last ones weren't added in feature sync PR: llvm#168750) Parts of the PR (test) have been realized using Claude Code
gandhi56
pushed a commit
that referenced
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Jul 9, 2026
…tor internal cpu type tables in LLVM (#171172) This is a continuation of previous PR: #168750 compiler-rt was synced with libgcc on ProcessorVendor and ProcessorSubtype fields and so was llvm. Cpu type, subtype and vendor entries in X86TargetParser.def were refactored to use ABI_VALUE. LLVM doesn't set the ABI_VALUE for its enums -- clang now takes care of that by reading the ABI_VALUE. I've removed and added some comments to better explain what is going on. While at it, I've added tests to check that right values are passed for vendor, subtypes, types and features (the last ones weren't added in feature sync PR: #168750) Parts of the PR (test) have been realized using Claude Code
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This is a continuation of previous PR: #168750
compiler-rt was synced with libgcc on ProcessorVendor and ProcessorSubtype fields and so was llvm. Cpu type, subtype and vendor entries in X86TargetParser.def were refactored to use ABI_VALUE.
LLVM doesn't set the ABI_VALUE for its enums -- clang now takes care of that by reading the ABI_VALUE.
I've removed and added some comments to better explain what is going on.
While at it, I've added tests to check that right values are passed for vendor, subtypes, types and features (the last ones weren't added in feature sync PR: #168750)
Parts of the PR (test) have been realized using Claude Code