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[X86][GlobalISel] Adding missing Query to G_BUILD_VECTOR legalization (#199435)
Once G_BUILD_VECTOR was fixed, legalize-undef-vec-scaling.mir falled into endless legalization loop as incoming MIR doesn't match correct lowering of the type.
1 parent 4f73c81 commit ba7b74f

2 files changed

Lines changed: 22 additions & 28 deletions

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‎llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -547,7 +547,8 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
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return (HasSSE1 && typeInSet(0, {v4s32})(Query)) ||
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(HasSSE2 && typeInSet(0, {v2s64, v8s16, v16s8})(Query)) ||
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(HasAVX && typeInSet(0, {v4s64, v8s32, v16s16, v32s8})(Query)) ||
550-
(HasAVX512 && typeInSet(0, {v8s64, v16s32, v32s16, v64s8}));
550+
(HasAVX512 &&
551+
typeInSet(0, {v8s64, v16s32, v32s16, v64s8})(Query));
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})
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.clampNumElements(0, v16s8, s8MaxVector)
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.clampNumElements(0, v8s16, s16MaxVector)

‎llvm/test/CodeGen/X86/GlobalISel/legalize-undef-vec-scaling.mir‎

Lines changed: 20 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -30,37 +30,30 @@ name: test_g_implicit_def_cample_size
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body: |
3131
bb.1:
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; AVX2-LABEL: name: test_g_implicit_def_cample_size
33-
; AVX2: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
34-
; AVX2-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<5 x s64>) = G_BUILD_VECTOR [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64)
35-
; AVX2-NEXT: [[TRUNC:%[0-9]+]]:_(<5 x s63>) = G_TRUNC [[BUILD_VECTOR]](<5 x s64>)
36-
; AVX2-NEXT: RET 0, implicit [[TRUNC]](<5 x s63>)
33+
; AVX2: [[COPY:%[0-9]+]]:_(p0) = COPY $rdi
34+
; AVX2-NEXT: [[DEF:%[0-9]+]]:_(<5 x s63>) = G_IMPLICIT_DEF
35+
; AVX2-NEXT: G_STORE [[DEF]](<5 x s63>), [[COPY]](p0) :: (store (<5 x s63>), align 64)
36+
; AVX2-NEXT: $rax = COPY [[COPY]](p0)
37+
; AVX2-NEXT: RET 0, $rax
3738
;
3839
; SSE2-LABEL: name: test_g_implicit_def_cample_size
39-
; SSE2: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
40-
; SSE2-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<5 x s64>) = G_BUILD_VECTOR [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64)
41-
; SSE2-NEXT: [[TRUNC:%[0-9]+]]:_(<5 x s63>) = G_TRUNC [[BUILD_VECTOR]](<5 x s64>)
42-
; SSE2-NEXT: RET 0, implicit [[TRUNC]](<5 x s63>)
40+
; SSE2: [[COPY:%[0-9]+]]:_(p0) = COPY $rdi
41+
; SSE2-NEXT: [[DEF:%[0-9]+]]:_(<5 x s63>) = G_IMPLICIT_DEF
42+
; SSE2-NEXT: G_STORE [[DEF]](<5 x s63>), [[COPY]](p0) :: (store (<5 x s63>), align 64)
43+
; SSE2-NEXT: $rax = COPY [[COPY]](p0)
44+
; SSE2-NEXT: RET 0, $rax
4345
;
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; AVX512F-LABEL: name: test_g_implicit_def_cample_size
45-
; AVX512F: [[CONSTANT_POOL:%[0-9]+]]:_(p0) = G_CONSTANT_POOL %const.0
46-
; AVX512F-NEXT: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[CONSTANT_POOL]](p0) :: (load (s64) from constant-pool, align 64)
47-
; AVX512F-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
48-
; AVX512F-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[CONSTANT_POOL]], [[C]](s64)
49-
; AVX512F-NEXT: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD]](p0) :: (load (s64) from constant-pool + 8, basealign 64)
50-
; AVX512F-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
51-
; AVX512F-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[CONSTANT_POOL]], [[C1]](s64)
52-
; AVX512F-NEXT: [[LOAD2:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD1]](p0) :: (load (s64) from constant-pool + 16, align 16, basealign 64)
53-
; AVX512F-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 24
54-
; AVX512F-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[CONSTANT_POOL]], [[C2]](s64)
55-
; AVX512F-NEXT: [[LOAD3:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD2]](p0) :: (load (s64) from constant-pool + 24, basealign 64)
56-
; AVX512F-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
57-
; AVX512F-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[CONSTANT_POOL]], [[C3]](s64)
58-
; AVX512F-NEXT: [[LOAD4:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD3]](p0) :: (load (s64) from constant-pool + 32, align 32, basealign 64)
59-
; AVX512F-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<5 x s64>) = G_BUILD_VECTOR [[LOAD]](s64), [[LOAD1]](s64), [[LOAD2]](s64), [[LOAD3]](s64), [[LOAD4]](s64)
60-
; AVX512F-NEXT: [[TRUNC:%[0-9]+]]:_(<5 x s63>) = G_TRUNC [[BUILD_VECTOR]](<5 x s64>)
61-
; AVX512F-NEXT: RET 0, implicit [[TRUNC]](<5 x s63>)
62-
%0:_(<5 x s63>) = G_IMPLICIT_DEF
63-
RET 0, implicit %0
47+
; AVX512F: [[COPY:%[0-9]+]]:_(p0) = COPY $rdi
48+
; AVX512F-NEXT: [[DEF:%[0-9]+]]:_(<5 x s63>) = G_IMPLICIT_DEF
49+
; AVX512F-NEXT: G_STORE [[DEF]](<5 x s63>), [[COPY]](p0) :: (store (<5 x s63>), align 64)
50+
; AVX512F-NEXT: $rax = COPY [[COPY]](p0)
51+
; AVX512F-NEXT: RET 0, $rax
52+
%0:_(p0) = COPY $rdi
53+
%1:_(<5 x s63>) = G_IMPLICIT_DEF
54+
G_STORE %1:_(<5 x s63>), %0:_(p0) :: (store (<5 x s63>), align 64)
55+
$rax = COPY %0:_(p0)
56+
RET 0, $rax
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...
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