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[LV] Add VPlan printing test with casts converted to single scalar (NFC) (#202200)
Add test coverage for additional paths that can create single-scalar casts: sinkScalarOperands and induction optimization.
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‎llvm/test/Transforms/LoopVectorize/VPlan/AArch64/single-scalar-cast.ll‎

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; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --filter-out-after "middle.block:" --filter-out-after "middleb.block:" --version 6
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; RUN: opt -passes=loop-vectorize -force-vector-interleave=1 -force-vector-width=2 -vplan-print-after=printOptimizedVPlan -disable-output %s 2>&1 | FileCheck %s
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target triple = "arm64-apple-macosx"
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define i16 @narrow_iv_cast_to_single_scalar(ptr %p, ptr %q) {
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; CHECK-LABEL: VPlan for loop in 'narrow_iv_cast_to_single_scalar'
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; CHECK: VPlan 'Initial VPlan for VF={2},UF>=1' {
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; CHECK-NEXT: Live-in vp<[[VP0:%[0-9]+]]> = VF
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; CHECK-NEXT: Live-in vp<[[VP1:%[0-9]+]]> = VF * UF
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; CHECK-NEXT: Live-in vp<[[VP2:%[0-9]+]]> = vector-trip-count
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; CHECK-NEXT: Live-in ir<2> = original trip-count
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; CHECK-EMPTY:
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; CHECK-NEXT: ir-bb<entry>:
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; CHECK-NEXT: Successor(s): scalar.ph, vector.ph
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; CHECK-EMPTY:
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; CHECK-NEXT: vector.ph:
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; CHECK-NEXT: Successor(s): vector loop
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; CHECK-EMPTY:
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; CHECK-NEXT: <x1> vector loop: {
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; CHECK-NEXT: vp<[[VP3:%[0-9]+]]> = CANONICAL-IV
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; CHECK-EMPTY:
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; CHECK-NEXT: vector.body:
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; CHECK-NEXT: vp<[[VP4:%[0-9]+]]> = SCALAR-STEPS vp<[[VP3]]>, ir<1>, vp<[[VP0]]>
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; CHECK-NEXT: CLONE ir<%shr> = lshr vp<[[VP4]]>, ir<1>
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; CHECK-NEXT: CLONE ir<%shr.ext> = zext ir<%shr>
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; CHECK-NEXT: CLONE ir<%gep.p> = getelementptr ir<%p>, ir<%shr.ext>
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; CHECK-NEXT: CLONE ir<%l> = load ir<%gep.p>
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; CHECK-NEXT: EMIT vp<%index.next> = add nuw vp<[[VP3]]>, vp<[[VP1]]>
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; CHECK-NEXT: EMIT branch-on-count vp<%index.next>, vp<[[VP2]]>
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; CHECK-NEXT: No successors
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; CHECK-NEXT: }
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; CHECK-NEXT: Successor(s): middle.block
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; CHECK-EMPTY:
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; CHECK-NEXT: middle.block:
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;
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entry:
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br label %loop
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loop:
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%iv = phi i32 [ %iv.next, %loop ], [ 0, %entry ]
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%shr = lshr i32 %iv, 1
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%shr.ext = zext i32 %shr to i64
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%gep.p = getelementptr i8, ptr %p, i64 %shr.ext
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%l = load i8, ptr %gep.p, align 1
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%l.ext = zext i8 %l to i32
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%idxprom = zext i32 %l.ext to i64
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%gep.q = getelementptr i8, ptr %q, i64 %idxprom
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%l.q = load i32, ptr %gep.q, align 4
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%iv.next = add i32 %iv, 1
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%ec = icmp eq i32 %iv, 1
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br i1 %ec, label %exit, label %loop
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exit:
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%res = trunc i32 %l.ext to i16
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ret i16 %res
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}
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define void @sink_replicate_region_with_cast(ptr %dst, i64 %n) {
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; CHECK-LABEL: VPlan for loop in 'sink_replicate_region_with_cast'
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; CHECK: VPlan 'Initial VPlan for VF={2},UF>=1' {
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; CHECK-NEXT: Live-in vp<[[VP0:%[0-9]+]]> = VF
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; CHECK-NEXT: Live-in vp<[[VP1:%[0-9]+]]> = VF * UF
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; CHECK-NEXT: Live-in vp<[[VP2:%[0-9]+]]> = vector-trip-count
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; CHECK-NEXT: vp<[[VP3:%[0-9]+]]> = original trip-count
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; CHECK-EMPTY:
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; CHECK-NEXT: ir-bb<entry>:
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; CHECK-NEXT: EMIT vp<[[VP3]]> = EXPAND SCEV (1 + (trunc i64 %n to i32))
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; CHECK-NEXT: Successor(s): scalar.ph, vector.ph
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; CHECK-EMPTY:
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; CHECK-NEXT: vector.ph:
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; CHECK-NEXT: Successor(s): vector loop
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; CHECK-EMPTY:
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; CHECK-NEXT: <x1> vector loop: {
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; CHECK-NEXT: vp<[[VP4:%[0-9]+]]> = CANONICAL-IV
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; CHECK-EMPTY:
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; CHECK-NEXT: vector.body:
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; CHECK-NEXT: vp<[[VP5:%[0-9]+]]> = SCALAR-STEPS vp<[[VP4]]>, ir<1>, vp<[[VP0]]>
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; CHECK-NEXT: CLONE ir<%conv> = zext vp<[[VP5]]>
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; CHECK-NEXT: CLONE ir<%gep> = getelementptr ir<%dst>, ir<%conv>
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; CHECK-NEXT: vp<[[VP6:%[0-9]+]]> = vector-pointer ir<%gep>, ir<1>
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; CHECK-NEXT: WIDEN ir<%l> = load vp<[[VP6]]>
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; CHECK-NEXT: WIDEN ir<%c> = fcmp olt ir<%l>, ir<0.000000e+00>
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; CHECK-NEXT: Successor(s): pred.store
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; CHECK-EMPTY:
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; CHECK-NEXT: <xVFxUF> pred.store: {
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; CHECK-NEXT: pred.store.entry:
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; CHECK-NEXT: BRANCH-ON-MASK ir<%c>
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; CHECK-NEXT: Successor(s): pred.store.if, pred.store.continue
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; CHECK-EMPTY:
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; CHECK-NEXT: pred.store.if:
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; CHECK-NEXT: vp<[[VP7:%[0-9]+]]> = SCALAR-STEPS vp<[[VP4]]>, ir<1>, vp<[[VP0]]>
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; CHECK-NEXT: REPLICATE ir<%conv>.1 = zext vp<[[VP7]]>
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; CHECK-NEXT: REPLICATE ir<%gep>.1 = getelementptr ir<%dst>, ir<%conv>.1
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; CHECK-NEXT: REPLICATE store ir<0.000000e+00>, ir<%gep>.1
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; CHECK-NEXT: Successor(s): pred.store.continue
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; CHECK-EMPTY:
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; CHECK-NEXT: pred.store.continue:
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; CHECK-NEXT: No successors
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; CHECK-NEXT: }
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; CHECK-NEXT: Successor(s): then.0
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; CHECK-EMPTY:
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; CHECK-NEXT: then.0:
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; CHECK-NEXT: EMIT vp<%index.next> = add nuw vp<[[VP4]]>, vp<[[VP1]]>
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; CHECK-NEXT: EMIT branch-on-count vp<%index.next>, vp<[[VP2]]>
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; CHECK-NEXT: No successors
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; CHECK-NEXT: }
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; CHECK-NEXT: Successor(s): middle.block
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; CHECK-EMPTY:
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; CHECK-NEXT: middle.block:
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;
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entry:
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br label %loop.header
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loop.header:
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%iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]
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%conv = zext i32 %iv to i64
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%gep = getelementptr double, ptr %dst, i64 %conv
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%l = load double, ptr %gep, align 8
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%c = fcmp olt double %l, 0.000000e+00
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br i1 %c, label %then, label %loop.latch
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then:
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store double 0.000000e+00, ptr %gep, align 8
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br label %loop.latch
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loop.latch:
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%iv.next = add i32 %iv, 1
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%ec = icmp ugt i64 %n, %conv
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br i1 %ec, label %loop.header, label %exit
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exit:
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ret void
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}

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