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Add a bunch more X86 AVX2 instructions and their corresponding intrinsics.
llvm-svn: 143529
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4 files changed

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‎llvm/include/llvm/IntrinsicsX86.td‎

Lines changed: 104 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1525,6 +1525,110 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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llvm_v16i16_ty], [IntrNoMem]>;
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}
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// Absolute value ops
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_avx2_pabs_b : GCCBuiltin<"__builtin_ia32_pabsb256">,
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Intrinsic<[llvm_v32i8_ty], [llvm_v32i8_ty], [IntrNoMem]>;
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def int_x86_avx2_pabs_w : GCCBuiltin<"__builtin_ia32_pabsw256">,
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Intrinsic<[llvm_v16i16_ty], [llvm_v16i16_ty], [IntrNoMem]>;
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def int_x86_avx2_pabs_d : GCCBuiltin<"__builtin_ia32_pabsd256">,
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Intrinsic<[llvm_v8i32_ty], [llvm_v8i32_ty], [IntrNoMem]>;
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}
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// Horizontal arithmetic ops
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_avx2_phadd_w : GCCBuiltin<"__builtin_ia32_phaddw256">,
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Intrinsic<[llvm_v16i16_ty], [llvm_v16i16_ty,
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llvm_v16i16_ty], [IntrNoMem]>;
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def int_x86_avx2_phadd_d : GCCBuiltin<"__builtin_ia32_phaddd256">,
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Intrinsic<[llvm_v8i32_ty], [llvm_v8i32_ty,
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llvm_v8i32_ty], [IntrNoMem]>;
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def int_x86_avx2_phadd_sw : GCCBuiltin<"__builtin_ia32_phaddsw256">,
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Intrinsic<[llvm_v16i16_ty], [llvm_v16i16_ty,
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llvm_v16i16_ty], [IntrNoMem]>;
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def int_x86_avx2_phsub_w : GCCBuiltin<"__builtin_ia32_phsubw256">,
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Intrinsic<[llvm_v16i16_ty], [llvm_v16i16_ty,
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llvm_v16i16_ty], [IntrNoMem]>;
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def int_x86_avx2_phsub_d : GCCBuiltin<"__builtin_ia32_phsubd256">,
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Intrinsic<[llvm_v8i32_ty], [llvm_v8i32_ty,
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llvm_v8i32_ty], [IntrNoMem]>;
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def int_x86_avx2_phsub_sw : GCCBuiltin<"__builtin_ia32_phsubsw256">,
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Intrinsic<[llvm_v16i16_ty], [llvm_v16i16_ty,
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llvm_v16i16_ty], [IntrNoMem]>;
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def int_x86_avx2_pmadd_ub_sw : GCCBuiltin<"__builtin_ia32_pmaddubsw256">,
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Intrinsic<[llvm_v16i16_ty], [llvm_v32i8_ty,
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llvm_v32i8_ty], [IntrNoMem]>;
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}
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// Sign ops
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_avx2_psign_b : GCCBuiltin<"__builtin_ia32_psignb256">,
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Intrinsic<[llvm_v32i8_ty], [llvm_v32i8_ty,
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llvm_v32i8_ty], [IntrNoMem]>;
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def int_x86_avx2_psign_w : GCCBuiltin<"__builtin_ia32_psignw256">,
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Intrinsic<[llvm_v16i16_ty], [llvm_v16i16_ty,
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llvm_v16i16_ty], [IntrNoMem]>;
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def int_x86_avx2_psign_d : GCCBuiltin<"__builtin_ia32_psignd256">,
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Intrinsic<[llvm_v8i32_ty], [llvm_v8i32_ty,
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llvm_v8i32_ty], [IntrNoMem]>;
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}
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// Packed multiply high with round and scale
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_avx2_pmul_hr_sw : GCCBuiltin<"__builtin_ia32_pmulhrsw256">,
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Intrinsic<[llvm_v16i16_ty], [llvm_v16i16_ty,
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llvm_v16i16_ty], [IntrNoMem, Commutative]>;
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}
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// Vector sign and zero extend
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_avx2_pmovsxbd : GCCBuiltin<"__builtin_ia32_pmovsxbd256">,
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Intrinsic<[llvm_v8i32_ty], [llvm_v16i8_ty],
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[IntrNoMem]>;
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def int_x86_avx2_pmovsxbq : GCCBuiltin<"__builtin_ia32_pmovsxbq256">,
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Intrinsic<[llvm_v4i64_ty], [llvm_v16i8_ty],
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[IntrNoMem]>;
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def int_x86_avx2_pmovsxbw : GCCBuiltin<"__builtin_ia32_pmovsxbw256">,
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Intrinsic<[llvm_v16i16_ty], [llvm_v16i8_ty],
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[IntrNoMem]>;
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def int_x86_avx2_pmovsxdq : GCCBuiltin<"__builtin_ia32_pmovsxdq256">,
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Intrinsic<[llvm_v4i64_ty], [llvm_v4i32_ty],
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[IntrNoMem]>;
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def int_x86_avx2_pmovsxwd : GCCBuiltin<"__builtin_ia32_pmovsxwd256">,
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Intrinsic<[llvm_v8i32_ty], [llvm_v8i16_ty],
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[IntrNoMem]>;
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def int_x86_avx2_pmovsxwq : GCCBuiltin<"__builtin_ia32_pmovsxwq256">,
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Intrinsic<[llvm_v4i64_ty], [llvm_v8i16_ty],
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[IntrNoMem]>;
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def int_x86_avx2_pmovzxbd : GCCBuiltin<"__builtin_ia32_pmovzxbd256">,
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Intrinsic<[llvm_v8i32_ty], [llvm_v16i8_ty],
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[IntrNoMem]>;
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def int_x86_avx2_pmovzxbq : GCCBuiltin<"__builtin_ia32_pmovzxbq256">,
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Intrinsic<[llvm_v4i64_ty], [llvm_v16i8_ty],
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[IntrNoMem]>;
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def int_x86_avx2_pmovzxbw : GCCBuiltin<"__builtin_ia32_pmovzxbw256">,
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Intrinsic<[llvm_v16i16_ty], [llvm_v16i8_ty],
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[IntrNoMem]>;
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def int_x86_avx2_pmovzxdq : GCCBuiltin<"__builtin_ia32_pmovzxdq256">,
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Intrinsic<[llvm_v4i64_ty], [llvm_v4i32_ty],
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[IntrNoMem]>;
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def int_x86_avx2_pmovzxwd : GCCBuiltin<"__builtin_ia32_pmovzxwd256">,
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Intrinsic<[llvm_v8i32_ty], [llvm_v8i16_ty],
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[IntrNoMem]>;
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def int_x86_avx2_pmovzxwq : GCCBuiltin<"__builtin_ia32_pmovzxwq256">,
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Intrinsic<[llvm_v4i64_ty], [llvm_v8i16_ty],
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[IntrNoMem]>;
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}
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// Misc.
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_avx2_pmovmskb : GCCBuiltin<"__builtin_ia32_pmovmskb256">,
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Intrinsic<[llvm_i32_ty], [llvm_v32i8_ty], [IntrNoMem]>;
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def int_x86_avx2_pshuf_b : GCCBuiltin<"__builtin_ia32_pshufb256">,
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Intrinsic<[llvm_v32i8_ty], [llvm_v32i8_ty,
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llvm_v32i8_ty], [IntrNoMem]>;
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}
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//===----------------------------------------------------------------------===//
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// MMX
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‎llvm/lib/Target/X86/X86InstrFragmentsSIMD.td‎

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -276,11 +276,12 @@ def memopv8i16 : PatFrag<(ops node:$ptr), (v8i16 (memop node:$ptr))>;
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def memopv16i8 : PatFrag<(ops node:$ptr), (v16i8 (memop node:$ptr))>;
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// 256-bit memop pattern fragments
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def memopv32i8 : PatFrag<(ops node:$ptr), (v32i8 (memop node:$ptr))>;
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def memopv8f32 : PatFrag<(ops node:$ptr), (v8f32 (memop node:$ptr))>;
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def memopv4f64 : PatFrag<(ops node:$ptr), (v4f64 (memop node:$ptr))>;
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def memopv4i64 : PatFrag<(ops node:$ptr), (v4i64 (memop node:$ptr))>;
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def memopv8i32 : PatFrag<(ops node:$ptr), (v8i32 (memop node:$ptr))>;
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def memopv16i16 : PatFrag<(ops node:$ptr), (v16i16 (memop node:$ptr))>;
284+
def memopv32i8 : PatFrag<(ops node:$ptr), (v32i8 (memop node:$ptr))>;
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285286
// SSSE3 uses MMX registers for some instructions. They aren't aligned on a
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// 16-byte boundary.
@@ -326,6 +327,8 @@ def bc_v4i32 : PatFrag<(ops node:$in), (v4i32 (bitconvert node:$in))>;
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def bc_v2i64 : PatFrag<(ops node:$in), (v2i64 (bitconvert node:$in))>;
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// 256-bit bitconvert pattern fragments
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def bc_v32i8 : PatFrag<(ops node:$in), (v32i8 (bitconvert node:$in))>;
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def bc_v16i16 : PatFrag<(ops node:$in), (v16i16 (bitconvert node:$in))>;
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def bc_v8i32 : PatFrag<(ops node:$in), (v8i32 (bitconvert node:$in))>;
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def bc_v4i64 : PatFrag<(ops node:$in), (v4i64 (bitconvert node:$in))>;
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