AMDGPU: Regenerate test checks (#188862)

arsenm · web-flow · commit 67ea4de3c610 · 2026-03-26T22:48:52.000Z
diff --git a/llvm/test/CodeGen/AMDGPU/fract-match.ll b/llvm/test/CodeGen/AMDGPU/fract-match.ll
@@ -1,5 +1,4 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
 ; Test with buggy fract, shouldn't match
 ; RUN: opt -S -mtriple=amdgcn-amd-amdpal -mcpu=tahiti -amdgpu-codegenprepare %s | FileCheck -check-prefixes=IR,GFX6-IR %s
 
@@ -3938,6 +3937,28 @@ define double @fract_match_f64_assume_not_nan(double %x) #0 {
 ; GFX12-NEXT:    s_delay_alu instid0(VALU_DEP_2)
 ; GFX12-NEXT:    v_dual_cndmask_b32 v0, 0, v2 :: v_dual_cndmask_b32 v1, 0, v3
 ; GFX12-NEXT:    s_setpc_b64 s[30:31]
+; GFX6-IR-LABEL: define double @fract_match_f64_assume_not_nan(
+; GFX6-IR-SAME: double [[X:%.*]]) #[[ATTR1:[0-9]+]] {
+; GFX6-IR-NEXT:  [[ENTRY:.*:]]
+; GFX6-IR-NEXT:    [[IS_ORD:%.*]] = fcmp ord double [[X]], 0.000000e+00
+; GFX6-IR-NEXT:    tail call void @llvm.assume(i1 [[IS_ORD]])
+; GFX6-IR-NEXT:    [[FLOOR:%.*]] = tail call double @llvm.floor.f64(double [[X]])
+; GFX6-IR-NEXT:    [[SUB:%.*]] = fsub double [[X]], [[FLOOR]]
+; GFX6-IR-NEXT:    [[MIN:%.*]] = tail call double @llvm.minnum.f64(double [[SUB]], double 0x3FEFFFFFFFFFFFFF)
+; GFX6-IR-NEXT:    [[X_ABS:%.*]] = tail call double @llvm.fabs.f64(double [[X]])
+; GFX6-IR-NEXT:    [[IS_INF:%.*]] = fcmp oeq double [[X_ABS]], 0x7FF0000000000000
+; GFX6-IR-NEXT:    [[RESULT:%.*]] = select i1 [[IS_INF]], double 0.000000e+00, double [[MIN]]
+; GFX6-IR-NEXT:    ret double [[RESULT]]
+; IR-FRACT-LABEL: define double @fract_match_f64_assume_not_nan(
+; IR-FRACT-SAME: double [[X:%.*]]) #[[ATTR1:[0-9]+]] {
+; IR-FRACT-NEXT:  [[ENTRY:.*:]]
+; IR-FRACT-NEXT:    [[IS_ORD:%.*]] = fcmp ord double [[X]], 0.000000e+00
+; IR-FRACT-NEXT:    tail call void @llvm.assume(i1 [[IS_ORD]])
+; IR-FRACT-NEXT:    [[MIN:%.*]] = call nnan double @llvm.amdgcn.fract.f64(double [[X]])
+; IR-FRACT-NEXT:    [[X_ABS:%.*]] = tail call double @llvm.fabs.f64(double [[X]])
+; IR-FRACT-NEXT:    [[IS_INF:%.*]] = fcmp oeq double [[X_ABS]], 0x7FF0000000000000
+; IR-FRACT-NEXT:    [[RESULT:%.*]] = select i1 [[IS_INF]], double 0.000000e+00, double [[MIN]]
+; IR-FRACT-NEXT:    ret double [[RESULT]]
 entry:
   %is.ord = fcmp ord double %x, 0.000000e+00
   tail call void @llvm.assume(i1 %is.ord)
