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AMDGPU/GlobalISel: Use B32 for readfirstlane (#187809)
Using B32 would also add missing pointer support to readfirstlane intrinsic rule.
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4 files changed

+126
-68
lines changed

4 files changed

+126
-68
lines changed

‎llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1534,7 +1534,7 @@ RegBankLegalizeRules::RegBankLegalizeRules(const GCNSubtarget &_ST,
15341534
.Div(S32, {{}, {Vgpr32, None, Vgpr32, Vgpr32}});
15351535

15361536
addRulesForIOpcs({amdgcn_readfirstlane})
1537-
.Any({{UniS32, _, DivS32}, {{}, {Sgpr32, None, Vgpr32}}})
1537+
.Any({{UniB32, _, DivB32}, {{}, {SgprB32, None, VgprB32}}})
15381538
// this should not exist in the first place, it is from call lowering
15391539
// readfirstlaning just in case register is not in sgpr.
15401540
.Any({{UniS32, _, UniS32}, {{}, {Sgpr32, None, Vgpr32}}});

‎llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll‎

Lines changed: 40 additions & 40 deletions
Original file line numberDiff line numberDiff line change
@@ -1613,10 +1613,10 @@ define void @test_readfirstlane_v8i16(ptr addrspace(1) %out, <8 x i16> %src) {
16131613
; CHECK-GISEL-LABEL: test_readfirstlane_v8i16:
16141614
; CHECK-GISEL: ; %bb.0:
16151615
; CHECK-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1616-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s7, v5
1617-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s6, v4
1618-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s5, v3
16191616
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s4, v2
1617+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s5, v3
1618+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s6, v4
1619+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s7, v5
16201620
; CHECK-GISEL-NEXT: ;;#ASMSTART
16211621
; CHECK-GISEL-NEXT: ; use s[4:7]
16221622
; CHECK-GISEL-NEXT: ;;#ASMEND
@@ -1646,14 +1646,14 @@ define void @test_readfirstlane_v16i16(ptr addrspace(1) %out, <16 x i16> %src) {
16461646
; CHECK-GISEL-LABEL: test_readfirstlane_v16i16:
16471647
; CHECK-GISEL: ; %bb.0:
16481648
; CHECK-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1649-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s11, v9
1650-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s10, v8
1651-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s9, v7
1652-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s8, v6
1653-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s7, v5
1654-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s6, v4
1655-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s5, v3
16561649
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s4, v2
1650+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s5, v3
1651+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s6, v4
1652+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s7, v5
1653+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s8, v6
1654+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s9, v7
1655+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s10, v8
1656+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s11, v9
16571657
; CHECK-GISEL-NEXT: ;;#ASMSTART
16581658
; CHECK-GISEL-NEXT: ; use s[4:11]
16591659
; CHECK-GISEL-NEXT: ;;#ASMEND
@@ -1691,22 +1691,22 @@ define void @test_readfirstlane_v32i16(ptr addrspace(1) %out, <32 x i16> %src) {
16911691
; CHECK-GISEL-LABEL: test_readfirstlane_v32i16:
16921692
; CHECK-GISEL: ; %bb.0:
16931693
; CHECK-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1694-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s19, v17
1695-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s18, v16
1696-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s17, v15
1697-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s16, v14
1698-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s15, v13
1699-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s14, v12
1700-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s13, v11
1701-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s12, v10
1702-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s11, v9
1703-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s10, v8
1704-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s9, v7
1705-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s8, v6
1706-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s7, v5
1707-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s6, v4
1708-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s5, v3
17091694
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s4, v2
1695+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s5, v3
1696+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s6, v4
1697+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s7, v5
1698+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s8, v6
1699+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s9, v7
1700+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s10, v8
1701+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s11, v9
1702+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s12, v10
1703+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s13, v11
1704+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s14, v12
1705+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s15, v13
1706+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s16, v14
1707+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s17, v15
1708+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s18, v16
1709+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s19, v17
17101710
; CHECK-GISEL-NEXT: ;;#ASMSTART
17111711
; CHECK-GISEL-NEXT: ; use s[4:19]
17121712
; CHECK-GISEL-NEXT: ;;#ASMEND
@@ -1745,22 +1745,22 @@ define void @test_readfirstlane_v32f16(ptr addrspace(1) %out, <32 x half> %src)
17451745
; CHECK-GISEL-LABEL: test_readfirstlane_v32f16:
17461746
; CHECK-GISEL: ; %bb.0:
17471747
; CHECK-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1748-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s19, v17
1749-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s18, v16
1750-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s17, v15
1751-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s16, v14
1752-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s15, v13
1753-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s14, v12
1754-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s13, v11
1755-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s12, v10
1756-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s11, v9
1757-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s10, v8
1758-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s9, v7
1759-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s8, v6
1760-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s7, v5
1761-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s6, v4
1762-
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s5, v3
17631748
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s4, v2
1749+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s5, v3
1750+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s6, v4
1751+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s7, v5
1752+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s8, v6
1753+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s9, v7
1754+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s10, v8
1755+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s11, v9
1756+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s12, v10
1757+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s13, v11
1758+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s14, v12
1759+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s15, v13
1760+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s16, v14
1761+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s17, v15
1762+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s18, v16
1763+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s19, v17
17641764
; CHECK-GISEL-NEXT: ;;#ASMSTART
17651765
; CHECK-GISEL-NEXT: ; use s[4:19]
17661766
; CHECK-GISEL-NEXT: ;;#ASMEND

‎llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.m0.ll‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,8 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
22
; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=gfx1030 < %s | FileCheck -check-prefixes=GFX10 -enable-var-scope %s
3-
; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=gfx1030 -global-isel -global-isel-abort=2 < %s | FileCheck -check-prefixes=GFX10 %s
3+
; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=gfx1030 -global-isel -new-reg-bank-select -global-isel-abort=2 < %s | FileCheck -check-prefixes=GFX10 %s
44
; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=gfx1100 < %s | FileCheck -check-prefixes=GFX11 -enable-var-scope %s
5-
; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=gfx1100 -global-isel -global-isel-abort=2 < %s | FileCheck -check-prefixes=GFX11 %s
5+
; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=gfx1100 -global-isel -new-reg-bank-select -global-isel-abort=2 < %s | FileCheck -check-prefixes=GFX11 %s
66
; Test codegen with readfirstlane used by M0.
77
;
88
; M0 can only be written to by SALU instructions so we can't emit

‎llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ptr.ll‎

Lines changed: 83 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,6 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
2-
; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=fiji < %s | FileCheck -check-prefix=CHECK-SDAG -enable-var-scope %s
2+
; RUN: llc -global-isel=0 -mtriple=amdgcn--amdhsa -mcpu=fiji < %s | FileCheck -check-prefixes=CHECK,CHECK-SDAG -enable-var-scope %s
3+
; RUN: llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn--amdhsa -mcpu=fiji < %s | FileCheck -check-prefixes=CHECK,CHECK-GISEL -enable-var-scope %s
34

45
define void @test_readfirstlane_p0(ptr addrspace(1) %out, ptr %src) {
56
; CHECK-SDAG-LABEL: test_readfirstlane_p0:
@@ -11,6 +12,16 @@ define void @test_readfirstlane_p0(ptr addrspace(1) %out, ptr %src) {
1112
; CHECK-SDAG-NEXT: ; use s[4:5]
1213
; CHECK-SDAG-NEXT: ;;#ASMEND
1314
; CHECK-SDAG-NEXT: s_setpc_b64 s[30:31]
15+
;
16+
; CHECK-GISEL-LABEL: test_readfirstlane_p0:
17+
; CHECK-GISEL: ; %bb.0:
18+
; CHECK-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
19+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s4, v2
20+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s5, v3
21+
; CHECK-GISEL-NEXT: ;;#ASMSTART
22+
; CHECK-GISEL-NEXT: ; use s[4:5]
23+
; CHECK-GISEL-NEXT: ;;#ASMEND
24+
; CHECK-GISEL-NEXT: s_setpc_b64 s[30:31]
1425
%x = call ptr @llvm.amdgcn.readfirstlane.p0(ptr %src)
1526
call void asm sideeffect "; use $0", "s"(ptr %x)
1627
ret void
@@ -30,20 +41,34 @@ define void @test_readfirstlane_v3p0(ptr addrspace(1) %out, <3 x ptr> %src) {
3041
; CHECK-SDAG-NEXT: ; use s[4:9]
3142
; CHECK-SDAG-NEXT: ;;#ASMEND
3243
; CHECK-SDAG-NEXT: s_setpc_b64 s[30:31]
44+
;
45+
; CHECK-GISEL-LABEL: test_readfirstlane_v3p0:
46+
; CHECK-GISEL: ; %bb.0:
47+
; CHECK-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
48+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s4, v2
49+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s5, v3
50+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s6, v4
51+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s7, v5
52+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s8, v6
53+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s9, v7
54+
; CHECK-GISEL-NEXT: ;;#ASMSTART
55+
; CHECK-GISEL-NEXT: ; use s[4:9]
56+
; CHECK-GISEL-NEXT: ;;#ASMEND
57+
; CHECK-GISEL-NEXT: s_setpc_b64 s[30:31]
3358
%x = call <3 x ptr> @llvm.amdgcn.readfirstlane.v3p0(<3 x ptr> %src)
3459
call void asm sideeffect "; use $0", "s"(<3 x ptr> %x)
3560
ret void
3661
}
3762

3863
define void @test_readfirstlane_p3(ptr addrspace(1) %out, ptr addrspace(3) %src) {
39-
; CHECK-SDAG-LABEL: test_readfirstlane_p3:
40-
; CHECK-SDAG: ; %bb.0:
41-
; CHECK-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
42-
; CHECK-SDAG-NEXT: v_readfirstlane_b32 s4, v2
43-
; CHECK-SDAG-NEXT: ;;#ASMSTART
44-
; CHECK-SDAG-NEXT: ; use s4
45-
; CHECK-SDAG-NEXT: ;;#ASMEND
46-
; CHECK-SDAG-NEXT: s_setpc_b64 s[30:31]
64+
; CHECK-LABEL: test_readfirstlane_p3:
65+
; CHECK: ; %bb.0:
66+
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
67+
; CHECK-NEXT: v_readfirstlane_b32 s4, v2
68+
; CHECK-NEXT: ;;#ASMSTART
69+
; CHECK-NEXT: ; use s4
70+
; CHECK-NEXT: ;;#ASMEND
71+
; CHECK-NEXT: s_setpc_b64 s[30:31]
4772
%x = call ptr addrspace(3) @llvm.amdgcn.readfirstlane.p3(ptr addrspace(3) %src)
4873
call void asm sideeffect "; use $0", "s"(ptr addrspace(3) %x)
4974
ret void
@@ -60,20 +85,31 @@ define void @test_readfirstlane_v3p3(ptr addrspace(1) %out, <3 x ptr addrspace(3
6085
; CHECK-SDAG-NEXT: ; use s[4:6]
6186
; CHECK-SDAG-NEXT: ;;#ASMEND
6287
; CHECK-SDAG-NEXT: s_setpc_b64 s[30:31]
88+
;
89+
; CHECK-GISEL-LABEL: test_readfirstlane_v3p3:
90+
; CHECK-GISEL: ; %bb.0:
91+
; CHECK-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
92+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s4, v2
93+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s5, v3
94+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s6, v4
95+
; CHECK-GISEL-NEXT: ;;#ASMSTART
96+
; CHECK-GISEL-NEXT: ; use s[4:6]
97+
; CHECK-GISEL-NEXT: ;;#ASMEND
98+
; CHECK-GISEL-NEXT: s_setpc_b64 s[30:31]
6399
%x = call <3 x ptr addrspace(3)> @llvm.amdgcn.readfirstlane.v3p3(<3 x ptr addrspace(3)> %src)
64100
call void asm sideeffect "; use $0", "s"(<3 x ptr addrspace(3)> %x)
65101
ret void
66102
}
67103

68104
define void @test_readfirstlane_p5(ptr addrspace(1) %out, ptr addrspace(5) %src) {
69-
; CHECK-SDAG-LABEL: test_readfirstlane_p5:
70-
; CHECK-SDAG: ; %bb.0:
71-
; CHECK-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
72-
; CHECK-SDAG-NEXT: v_readfirstlane_b32 s4, v2
73-
; CHECK-SDAG-NEXT: ;;#ASMSTART
74-
; CHECK-SDAG-NEXT: ; use s4
75-
; CHECK-SDAG-NEXT: ;;#ASMEND
76-
; CHECK-SDAG-NEXT: s_setpc_b64 s[30:31]
105+
; CHECK-LABEL: test_readfirstlane_p5:
106+
; CHECK: ; %bb.0:
107+
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
108+
; CHECK-NEXT: v_readfirstlane_b32 s4, v2
109+
; CHECK-NEXT: ;;#ASMSTART
110+
; CHECK-NEXT: ; use s4
111+
; CHECK-NEXT: ;;#ASMEND
112+
; CHECK-NEXT: s_setpc_b64 s[30:31]
77113
%x = call ptr addrspace(5) @llvm.amdgcn.readfirstlane.p5(ptr addrspace(5) %src)
78114
call void asm sideeffect "; use $0", "s"(ptr addrspace(5) %x)
79115
ret void
@@ -90,20 +126,31 @@ define void @test_readfirstlane_v3p5(ptr addrspace(1) %out, <3 x ptr addrspace(5
90126
; CHECK-SDAG-NEXT: ; use s[4:6]
91127
; CHECK-SDAG-NEXT: ;;#ASMEND
92128
; CHECK-SDAG-NEXT: s_setpc_b64 s[30:31]
129+
;
130+
; CHECK-GISEL-LABEL: test_readfirstlane_v3p5:
131+
; CHECK-GISEL: ; %bb.0:
132+
; CHECK-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
133+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s4, v2
134+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s5, v3
135+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s6, v4
136+
; CHECK-GISEL-NEXT: ;;#ASMSTART
137+
; CHECK-GISEL-NEXT: ; use s[4:6]
138+
; CHECK-GISEL-NEXT: ;;#ASMEND
139+
; CHECK-GISEL-NEXT: s_setpc_b64 s[30:31]
93140
%x = call <3 x ptr addrspace(5)> @llvm.amdgcn.readfirstlane.v3p5(<3 x ptr addrspace(5)> %src)
94141
call void asm sideeffect "; use $0", "s"(<3 x ptr addrspace(5)> %x)
95142
ret void
96143
}
97144

98145
define void @test_readfirstlane_p6(ptr addrspace(1) %out, ptr addrspace(6) %src) {
99-
; CHECK-SDAG-LABEL: test_readfirstlane_p6:
100-
; CHECK-SDAG: ; %bb.0:
101-
; CHECK-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
102-
; CHECK-SDAG-NEXT: v_readfirstlane_b32 s4, v2
103-
; CHECK-SDAG-NEXT: ;;#ASMSTART
104-
; CHECK-SDAG-NEXT: ; use s4
105-
; CHECK-SDAG-NEXT: ;;#ASMEND
106-
; CHECK-SDAG-NEXT: s_setpc_b64 s[30:31]
146+
; CHECK-LABEL: test_readfirstlane_p6:
147+
; CHECK: ; %bb.0:
148+
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
149+
; CHECK-NEXT: v_readfirstlane_b32 s4, v2
150+
; CHECK-NEXT: ;;#ASMSTART
151+
; CHECK-NEXT: ; use s4
152+
; CHECK-NEXT: ;;#ASMEND
153+
; CHECK-NEXT: s_setpc_b64 s[30:31]
107154
%x = call ptr addrspace(6) @llvm.amdgcn.readfirstlane.p6(ptr addrspace(6) %src)
108155
call void asm sideeffect "; use $0", "s"(ptr addrspace(6) %x)
109156
ret void
@@ -120,6 +167,17 @@ define void @test_readfirstlane_v3p6(ptr addrspace(1) %out, <3 x ptr addrspace(6
120167
; CHECK-SDAG-NEXT: ; use s[4:6]
121168
; CHECK-SDAG-NEXT: ;;#ASMEND
122169
; CHECK-SDAG-NEXT: s_setpc_b64 s[30:31]
170+
;
171+
; CHECK-GISEL-LABEL: test_readfirstlane_v3p6:
172+
; CHECK-GISEL: ; %bb.0:
173+
; CHECK-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
174+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s4, v2
175+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s5, v3
176+
; CHECK-GISEL-NEXT: v_readfirstlane_b32 s6, v4
177+
; CHECK-GISEL-NEXT: ;;#ASMSTART
178+
; CHECK-GISEL-NEXT: ; use s[4:6]
179+
; CHECK-GISEL-NEXT: ;;#ASMEND
180+
; CHECK-GISEL-NEXT: s_setpc_b64 s[30:31]
123181
%x = call <3 x ptr addrspace(6)> @llvm.amdgcn.readfirstlane.v3p6(<3 x ptr addrspace(6)> %src)
124182
call void asm sideeffect "; use $0", "s"(<3 x ptr addrspace(6)> %x)
125183
ret void

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