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WASM, WASM_X64: Support shift operations #1482

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Merged
ubaidsk merged 4 commits into from
Feb 1, 2023
Merged

WASM, WASM_X64: Support shift operations #1482

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6878528
WASM: Support shift operations
ubaidsk Jan 31, 2023
cdf08dd
TEST: Add/Update test for shift operations
ubaidsk Jan 31, 2023
a045849
X86Assembler: Implement SHL and SAR Instructions
ubaidsk Feb 1, 2023
177a12d
WASM_X64: Support I32Shl() and I32ShrS()
ubaidsk Feb 1, 2023
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X86Assembler: Implement SHL and SAR Instructions
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@ubaidsk
ubaidsk committed Feb 1, 2023
commit a0458491bc69d0747484de46fcb20b823ca9aafb
32 changes: 32 additions & 0 deletions src/libasr/codegen/x86_assembler.h
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Original file line number Diff line number Diff line change
Expand Up @@ -1254,6 +1254,38 @@ class X86Assembler {
EMIT("syscall");
}

// SHL - Shift Logical/Unsigned Left
void asm_shl_r64_cl(X64Reg r64) {
X86Reg r32 = X86Reg(r64 & 7);
m_code.push_back(m_al, rex(1, 0, 0, r64 >> 3));
m_code.push_back(m_al, 0xD3);
modrm_sib_disp(m_code, m_al, X86Reg::esp, &r32, nullptr, 1, 0, false);
EMIT("shl " + r2s(r64) + ", cl");
}

// SHL - Shift Logical/Unsigned Left
void asm_shl_r32_cl(X86Reg r32) {
m_code.push_back(m_al, 0xD3);
modrm_sib_disp(m_code, m_al, X86Reg::esp, &r32, nullptr, 1, 0, false);
EMIT("shl " + r2s(r32) + ", cl");
}

// SAR - Shift Arithmetic/Signed Right
void asm_sar_r64_cl(X64Reg r64) {
X86Reg r32 = X86Reg(r64 & 7);
m_code.push_back(m_al, rex(1, 0, 0, r64 >> 3));
m_code.push_back(m_al, 0xD3);
modrm_sib_disp(m_code, m_al, X86Reg::edi, &r32, nullptr, 1, 0, false);
EMIT("sar " + r2s(r64) + ", cl");
}

// SAR - Shift Arithmetic/Signed Right
void asm_sar_r32_cl(X86Reg r32) {
m_code.push_back(m_al, 0xD3);
modrm_sib_disp(m_code, m_al, X86Reg::edi, &r32, nullptr, 1, 0, false);
EMIT("sar " + r2s(r32) + ", cl");
}

void asm_fld_m32(X86Reg *base, X86Reg *index,
uint8_t scale, int32_t disp) {
m_code.push_back(m_al, 0xd9);
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