@@ -2161,6 +2161,25 @@ static struct mlxreg_core_platform_data mlxplat_default_led_wc_data = {
21612161 .counter = ARRAY_SIZE (mlxplat_mlxcpld_default_led_wc_data ),
21622162};
21632163
2164+ /* Platform led default data for water cooling Ethernet switch blade */
2165+ static struct mlxreg_core_data mlxplat_mlxcpld_default_led_eth_wc_blade_data [] = {
2166+ {
2167+ .label = "status:green" ,
2168+ .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET ,
2169+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK ,
2170+ },
2171+ {
2172+ .label = "status:red" ,
2173+ .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET ,
2174+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK
2175+ },
2176+ };
2177+
2178+ static struct mlxreg_core_platform_data mlxplat_default_led_eth_wc_blade_data = {
2179+ .data = mlxplat_mlxcpld_default_led_eth_wc_blade_data ,
2180+ .counter = ARRAY_SIZE (mlxplat_mlxcpld_default_led_eth_wc_blade_data ),
2181+ };
2182+
21642183/* Platform led MSN21xx system family data */
21652184static struct mlxreg_core_data mlxplat_mlxcpld_msn21xx_led_data [] = {
21662185 {
@@ -4708,6 +4727,31 @@ static int __init mlxplat_dmi_default_wc_matched(const struct dmi_system_id *dmi
47084727 return 1 ;
47094728}
47104729
4730+ static int __init mlxplat_dmi_default_eth_wc_blade_matched (const struct dmi_system_id * dmi )
4731+ {
4732+ int i ;
4733+
4734+ mlxplat_max_adap_num = MLXPLAT_CPLD_MAX_PHYS_ADAPTER_NUM ;
4735+ mlxplat_mux_num = ARRAY_SIZE (mlxplat_default_mux_data );
4736+ mlxplat_mux_data = mlxplat_default_mux_data ;
4737+ for (i = 0 ; i < mlxplat_mux_num ; i ++ ) {
4738+ mlxplat_mux_data [i ].values = mlxplat_msn21xx_channels ;
4739+ mlxplat_mux_data [i ].n_values =
4740+ ARRAY_SIZE (mlxplat_msn21xx_channels );
4741+ }
4742+ mlxplat_hotplug = & mlxplat_mlxcpld_default_wc_data ;
4743+ mlxplat_hotplug -> deferred_nr =
4744+ mlxplat_msn21xx_channels [MLXPLAT_CPLD_GRP_CHNL_NUM - 1 ];
4745+ mlxplat_led = & mlxplat_default_led_eth_wc_blade_data ;
4746+ mlxplat_regs_io = & mlxplat_default_ng_regs_io_data ;
4747+ for (i = 0 ; i < ARRAY_SIZE (mlxplat_mlxcpld_wd_set_type2 ); i ++ )
4748+ mlxplat_wd_data [i ] = & mlxplat_mlxcpld_wd_set_type2 [i ];
4749+ mlxplat_i2c = & mlxplat_mlxcpld_i2c_ng_data ;
4750+ mlxplat_regmap_config = & mlxplat_mlxcpld_regmap_config_ng ;
4751+
4752+ return 1 ;
4753+ }
4754+
47114755static int __init mlxplat_dmi_msn21xx_matched (const struct dmi_system_id * dmi )
47124756{
47134757 int i ;
@@ -4924,6 +4968,13 @@ static const struct dmi_system_id mlxplat_dmi_table[] __initconst = {
49244968 DMI_MATCH (DMI_BOARD_NAME , "VMOD0004" ),
49254969 },
49264970 },
4971+ {
4972+ .callback = mlxplat_dmi_default_eth_wc_blade_matched ,
4973+ .matches = {
4974+ DMI_MATCH (DMI_BOARD_NAME , "VMOD0005" ),
4975+ DMI_EXACT_MATCH (DMI_PRODUCT_SKU , "HI139" ),
4976+ },
4977+ },
49274978 {
49284979 .callback = mlxplat_dmi_qmb7xx_matched ,
49294980 .matches = {
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