@@ -451,13 +451,46 @@ struct my_can_bittiming_const {
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#define RISCV_HWPROBE_EXT_ZBA (1 << 3)
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#define RISCV_HWPROBE_EXT_ZBB (1 << 4)
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#define RISCV_HWPROBE_EXT_ZBS (1 << 5)
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+ #define RISCV_HWPROBE_EXT_ZICBOZ (1 << 6)
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+ #define RISCV_HWPROBE_EXT_ZBC (1 << 7)
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+ #define RISCV_HWPROBE_EXT_ZBKB (1 << 8)
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+ #define RISCV_HWPROBE_EXT_ZBKC (1 << 9)
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+ #define RISCV_HWPROBE_EXT_ZBKX (1 << 10)
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+ #define RISCV_HWPROBE_EXT_ZKND (1 << 11)
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+ #define RISCV_HWPROBE_EXT_ZKNE (1 << 12)
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+ #define RISCV_HWPROBE_EXT_ZKNH (1 << 13)
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+ #define RISCV_HWPROBE_EXT_ZKSED (1 << 14)
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+ #define RISCV_HWPROBE_EXT_ZKSH (1 << 15)
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+ #define RISCV_HWPROBE_EXT_ZKT (1 << 16)
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+ #define RISCV_HWPROBE_EXT_ZVBB (1 << 17)
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+ #define RISCV_HWPROBE_EXT_ZVBC (1 << 18)
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+ #define RISCV_HWPROBE_EXT_ZVKB (1 << 19)
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+ #define RISCV_HWPROBE_EXT_ZVKG (1 << 20)
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+ #define RISCV_HWPROBE_EXT_ZVKNED (1 << 21)
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+ #define RISCV_HWPROBE_EXT_ZVKNHA (1 << 22)
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+ #define RISCV_HWPROBE_EXT_ZVKNHB (1 << 23)
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+ #define RISCV_HWPROBE_EXT_ZVKSED (1 << 24)
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+ #define RISCV_HWPROBE_EXT_ZVKSH (1 << 25)
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+ #define RISCV_HWPROBE_EXT_ZVKT (1 << 26)
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+ #define RISCV_HWPROBE_EXT_ZFH (1 << 27)
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+ #define RISCV_HWPROBE_EXT_ZFHMIN (1 << 28)
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+ #define RISCV_HWPROBE_EXT_ZIHINTNTL (1 << 29)
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+ #define RISCV_HWPROBE_EXT_ZVFH (1 << 30)
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+ #define RISCV_HWPROBE_EXT_ZVFHMIN (1ULL << 31)
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+ #define RISCV_HWPROBE_EXT_ZFA (1ULL << 32)
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+ #define RISCV_HWPROBE_EXT_ZTSO (1ULL << 33)
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+ #define RISCV_HWPROBE_EXT_ZACAS (1ULL << 34)
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+ #define RISCV_HWPROBE_EXT_ZICOND (1ULL << 35)
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+ #define RISCV_HWPROBE_EXT_ZIHINTPAUSE (1ULL << 36)
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#define RISCV_HWPROBE_KEY_CPUPERF_0 5
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#define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0)
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#define RISCV_HWPROBE_MISALIGNED_EMULATED (1 << 0)
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#define RISCV_HWPROBE_MISALIGNED_SLOW (2 << 0)
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#define RISCV_HWPROBE_MISALIGNED_FAST (3 << 0)
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#define RISCV_HWPROBE_MISALIGNED_UNSUPPORTED (4 << 0)
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#define RISCV_HWPROBE_MISALIGNED_MASK (7 << 0)
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+ #define RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE 6
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+ #define RISCV_HWPROBE_WHICH_CPUS (1 << 0)
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struct riscv_hwprobe {};
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#endif
@@ -5906,13 +5939,46 @@ const (
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RISCV_HWPROBE_EXT_ZBA = C .RISCV_HWPROBE_EXT_ZBA
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RISCV_HWPROBE_EXT_ZBB = C .RISCV_HWPROBE_EXT_ZBB
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RISCV_HWPROBE_EXT_ZBS = C .RISCV_HWPROBE_EXT_ZBS
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+ RISCV_HWPROBE_EXT_ZICBOZ = C .RISCV_HWPROBE_EXT_ZICBOZ
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+ RISCV_HWPROBE_EXT_ZBC = C .RISCV_HWPROBE_EXT_ZBC
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+ RISCV_HWPROBE_EXT_ZBKB = C .RISCV_HWPROBE_EXT_ZBKB
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+ RISCV_HWPROBE_EXT_ZBKC = C .RISCV_HWPROBE_EXT_ZBKC
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+ RISCV_HWPROBE_EXT_ZBKX = C .RISCV_HWPROBE_EXT_ZBKX
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+ RISCV_HWPROBE_EXT_ZKND = C .RISCV_HWPROBE_EXT_ZKND
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+ RISCV_HWPROBE_EXT_ZKNE = C .RISCV_HWPROBE_EXT_ZKNE
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+ RISCV_HWPROBE_EXT_ZKNH = C .RISCV_HWPROBE_EXT_ZKNH
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+ RISCV_HWPROBE_EXT_ZKSED = C .RISCV_HWPROBE_EXT_ZKSED
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+ RISCV_HWPROBE_EXT_ZKSH = C .RISCV_HWPROBE_EXT_ZKSH
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+ RISCV_HWPROBE_EXT_ZKT = C .RISCV_HWPROBE_EXT_ZKT
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+ RISCV_HWPROBE_EXT_ZVBB = C .RISCV_HWPROBE_EXT_ZVBB
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+ RISCV_HWPROBE_EXT_ZVBC = C .RISCV_HWPROBE_EXT_ZVBC
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+ RISCV_HWPROBE_EXT_ZVKB = C .RISCV_HWPROBE_EXT_ZVKB
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+ RISCV_HWPROBE_EXT_ZVKG = C .RISCV_HWPROBE_EXT_ZVKG
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+ RISCV_HWPROBE_EXT_ZVKNED = C .RISCV_HWPROBE_EXT_ZVKNED
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+ RISCV_HWPROBE_EXT_ZVKNHA = C .RISCV_HWPROBE_EXT_ZVKNHA
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+ RISCV_HWPROBE_EXT_ZVKNHB = C .RISCV_HWPROBE_EXT_ZVKNHB
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+ RISCV_HWPROBE_EXT_ZVKSED = C .RISCV_HWPROBE_EXT_ZVKSED
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+ RISCV_HWPROBE_EXT_ZVKSH = C .RISCV_HWPROBE_EXT_ZVKSH
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+ RISCV_HWPROBE_EXT_ZVKT = C .RISCV_HWPROBE_EXT_ZVKT
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+ RISCV_HWPROBE_EXT_ZFH = C .RISCV_HWPROBE_EXT_ZFH
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+ RISCV_HWPROBE_EXT_ZFHMIN = C .RISCV_HWPROBE_EXT_ZFHMIN
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+ RISCV_HWPROBE_EXT_ZIHINTNTL = C .RISCV_HWPROBE_EXT_ZIHINTNTL
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+ RISCV_HWPROBE_EXT_ZVFH = C .RISCV_HWPROBE_EXT_ZVFH
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+ RISCV_HWPROBE_EXT_ZVFHMIN = C .RISCV_HWPROBE_EXT_ZVFHMIN
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+ RISCV_HWPROBE_EXT_ZFA = C .RISCV_HWPROBE_EXT_ZFA
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+ RISCV_HWPROBE_EXT_ZTSO = C .RISCV_HWPROBE_EXT_ZTSO
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+ RISCV_HWPROBE_EXT_ZACAS = C .RISCV_HWPROBE_EXT_ZACAS
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+ RISCV_HWPROBE_EXT_ZICOND = C .RISCV_HWPROBE_EXT_ZICOND
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+ RISCV_HWPROBE_EXT_ZIHINTPAUSE = C .RISCV_HWPROBE_EXT_ZIHINTPAUSE
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RISCV_HWPROBE_KEY_CPUPERF_0 = C .RISCV_HWPROBE_KEY_CPUPERF_0
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RISCV_HWPROBE_MISALIGNED_UNKNOWN = C .RISCV_HWPROBE_MISALIGNED_UNKNOWN
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RISCV_HWPROBE_MISALIGNED_EMULATED = C .RISCV_HWPROBE_MISALIGNED_EMULATED
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RISCV_HWPROBE_MISALIGNED_SLOW = C .RISCV_HWPROBE_MISALIGNED_SLOW
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RISCV_HWPROBE_MISALIGNED_FAST = C .RISCV_HWPROBE_MISALIGNED_FAST
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RISCV_HWPROBE_MISALIGNED_UNSUPPORTED = C .RISCV_HWPROBE_MISALIGNED_UNSUPPORTED
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RISCV_HWPROBE_MISALIGNED_MASK = C .RISCV_HWPROBE_MISALIGNED_MASK
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+ RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE = C .RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE
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+ RISCV_HWPROBE_WHICH_CPUS = C .RISCV_HWPROBE_WHICH_CPUS
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)
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type SchedAttr C.struct_sched_attr
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