cmd/compile: fix ANDI/SRWI merge on ppc64

pmur · ceseo · commit c8fb0ec5a005 · 2021-04-15T21:57:02.000Z
The shift amount should be masked to avoid rotation values beyond the numer of bits. In this case, if the shift amount is 0, it should rotate 0, not 32. Fixes #45589 Change-Id: I1e764497a39d0ec128e29af42352b70c70b2ecc5 Reviewed-on: https://go-review.googlesource.com/c/go/+/310569 Run-TryBot: Paul Murphy <murp@ibm.com> TryBot-Result: Go Bot <gobot@golang.org> Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com> Reviewed-by: Carlos Eduardo Seo <carlos.seo@linaro.org> Trust: Carlos Eduardo Seo <carlos.seo@linaro.org>
diff --git a/src/cmd/compile/internal/ssa/rewrite.go b/src/cmd/compile/internal/ssa/rewrite.go
@@ -1492,7 +1492,7 @@ func mergePPC64AndSrwi(m, s int64) int64 {
 	if !isPPC64WordRotateMask(mask) {
 		return 0
 	}
-	return encodePPC64RotateMask(32-s, mask, 32)
+	return encodePPC64RotateMask((32-s)&31, mask, 32)
 }
 
 // Test if a shift right feeding into a CLRLSLDI can be merged into RLWINM.
diff --git a/src/cmd/compile/internal/ssa/rewrite_test.go b/src/cmd/compile/internal/ssa/rewrite_test.go
@@ -205,6 +205,7 @@ func TestMergePPC64AndSrwi(t *testing.T) {
 		{0x00000000, 4, false, 0, 0},
 		{0xF0000000, 4, false, 0, 0},
 		{0xF0000000, 32, false, 0, 0},
+		{0xFFFFFFFF, 0, true, 0, 0xFFFFFFFF},
 	}
 	for i, v := range tests {
 		result := mergePPC64AndSrwi(v.and, v.srw)

Original file line number	Diff line number	Diff line change
`@@ -1492,7 +1492,7 @@ func mergePPC64AndSrwi(m, s int64) int64 {`
`1492`	`1492`	`if !isPPC64WordRotateMask(mask) {`
`1493`	`1493`	`return 0`
`1494`	`1494`	`}`
`1495`		`- return encodePPC64RotateMask(32-s, mask, 32)`
	`1495`	`+ return encodePPC64RotateMask((32-s)&31, mask, 32)`
`1496`	`1496`	`}`
`1497`	`1497`
`1498`	`1498`	`// Test if a shift right feeding into a CLRLSLDI can be merged into RLWINM.`
Original file line number	Diff line number	Diff line change
`@@ -205,6 +205,7 @@ func TestMergePPC64AndSrwi(t *testing.T) {`
`205`	`205`	`{0x00000000, 4, false, 0, 0},`
`206`	`206`	`{0xF0000000, 4, false, 0, 0},`
`207`	`207`	`{0xF0000000, 32, false, 0, 0},`
	`208`	`+ {0xFFFFFFFF, 0, true, 0, 0xFFFFFFFF},`
`208`	`209`	`}`
`209`	`210`	`for i, v := range tests {`
`210`	`211`	`result := mergePPC64AndSrwi(v.and, v.srw)`