Releases: gogpu/naga
v0.17.14
GLSL version-aware binding + UniformInfo reflection (BUG-GLES-005)
GLSL backend now provides full infrastructure for runtime binding fallback on GL < 4.2 drivers (e.g., WSL2 Mesa d3d12 with GL 4.1 / GLSL 410). Follows Rust wgpu-hal device.rs:438-461 pattern.
Added
SupportsExplicitLocations()onVersion— gateslayout(binding=N)emission on GLSL >= 420 (desktop) or >= 310 (ES). Matches Rust nagamod.rs:213.UniformInfostruct — reflection data for uniform/storage blocks (block name, binding, storage flag). Populated during GLSL code generation.TranslationInfo.Uniforms— carries uniform block reflection to HAL for post-linkglGetUniformBlockIndex/glUniformBlockBindingassignment.VersionES300constant — safe minimum for OpenGL ES contexts.
Fixed
- CI: Codecov OIDC migration — replaced
CODECOV_TOKENsecret with OIDC token exchange, fixing GPG signature verification failures.
Quality gates
- TestRustReference: ALL PASS (100%)
- SPIR-V validation: 172/172 (100%)
- golangci-lint: 0 issues
- CI: 10/10 checks pass (Linux, macOS, Windows)
v0.17.13 — PHI node ordering fix, path_count.wgsl VALID
Fixed (DXIL)
- PHI node ordering — Vello path_count.wgsl now passes IDxcValidator. mem2reg Phase B phi instructions grouped at top of basic blocks.
Added
- Coverage waves 3-4: hlsl 70.6%, wgsl/lower 65.3%, msl 64.2%, spirv 76.5%, dxil/emit 37.4%
Metrics (unchanged)
- gg production: 61/61 (100%)
- IDxcValidator: 161/170 (94.7%)
- DXC golden diff=0: 105 (55.1%)
v0.17.12 — ARCH-001 internal packages, 12/18 coverage ≥80%, 13 panics→errors
Enterprise Architecture Refactoring (ARCH-001)
All backends restructured following DXIL internal package pattern.
Internal packages (DXIL pattern applied to all backends)
- glsl/, msl/, hlsl/, spirv/ →
internal/codegen/ - wgsl/ →
internal/parser/+internal/lower/ - Shared:
internal/textutil/(IndentWriter DRY),internal/backend/(namer, sig packing),internal/registry/(type dedup) - Public API: real types, not aliases. go doc shows full struct definitions.
Test coverage (12/18 packages ≥80%)
| 100% | textutil, dxil/module |
|---|---|
| 83-97% | backend, mem2reg, dce, parser, bitcode, viewid, sroa, ir, container, glsl |
Error handling
- 13 panics → error returns across all backends
- 2 nilerr fixes (spirv silently swallowed errors)
- Unsupported stage validation (mesh/task → clear error)
- 11 dead functions removed (-929 LOC)
Metrics (unchanged)
- gg production: 61/61 (100%)
- DXC golden diff=0: 105 (55.1% parity)
- IDxcValidator: 161/170 (94.7%)
- golangci-lint: 0 issues
v0.17.11 — gg 61/61 (100%), fine.wgsl fixed, lint hardening
gg Production: 61/61 VALID (100%) 🏆
Zero DXIL validation failures across all gg production entry points.
Fixed
-
Array-of-vector flattening (BUG-DXIL-041) —
fine.wgsl"Invalid record" caused by 3 bugs in flattenedarray<vec4<f32>, N>locals: GEP index not scaled by vector width, single-scalar load instead of multi-scalar, garbage component IDs. -
All golangci-lint issues resolved — extracted goconst constants, removed unused nolint directives, excluded keyword maps and tmp/ from lint.
Metrics
| Metric | v0.17.10 | v0.17.11 |
|---|---|---|
| gg production | 58/59 | 61/61 (100%) 🏆 |
| DXC golden diff=0 | 105 | 105 |
| Line parity | 55.1% | 55.1% |
| IDxcValidator | 161/170 | 161/170 |
| Lint | issues | 0 issues |
v0.17.10 — 105 golden diff=0, 55.1% parity, ViewID + workgroup decomp
DXIL Architecture Push
Architectural improvements
- Workgroup struct decomposition — per-member globals with MSVC-mangled names
- ViewID ExprAlias/ExprPhi — precise post-mem2reg dataflow
- StmtEmit range merging — cross-range reassociation
- Instruction scheduling infrastructure — eval-right-first, resource read detection
Optimizations
- Constant folding (int-to-float casts, bitcast float→i32)
- Alignment encoding fix (log2+1)
- Mul-to-shl in CBV/UAV paths
- TBAA normalizer
| Metric | v0.17.9 | v0.17.10 |
|---|---|---|
| DXC golden diff=0 | 104 | 105 |
| Line parity | 54.5% | 55.1% |
| IDxcValidator | 161/170 | 161/170 |
v0.17.9 — 104 golden diff=0, 54.5% parity, loadInput DCE
DXIL Parity Push: 104 golden diff=0, 54.5% line parity
Crossed 100 diff=0 and 50% parity milestones. +10 diff=0 shaders, +6.4pp parity.
New optimizations
| Optimization | Impact |
|---|---|
| Per-member loadInput DCE | Backwards reachability eliminates unused struct input loads |
| Zero-store local promotion | Unassigned struct members → zero constants |
| QuantizeF16 legacy ops | legacyF32ToF16/F16ToF32, eliminates NativeLowPrecision cascade (13 shaders) |
| Same-type cast elimination | bitcast i32↔i32 is no-op |
| Strength reduction | sub X,C→add X,-C, mul X,2^N→shl X,N |
Bug fixes
| Fix | Root cause |
|---|---|
| Input sigId | Element index, not register row — broke packed inputs |
| ViewID StartCol | Packed linear indexing missing column offset |
| Cross-arg struct ordering | Reverse signature order globally |
| Int64 flag | Scanned from emitted bitcode, not IR types |
| createHandle | Always opcode 57, removed dead createHandleFromBinding |
| MSVC groupshared names | \01?name@@3typeA decoration |
Metrics
| Metric | v0.17.8 | v0.17.9 |
|---|---|---|
| DXC golden diff=0 | 94 | 104 (+10) |
| Line parity | 48.1% | 54.5% (+6.4pp) |
| IDxcValidator | 161/170 | 161/170 |
Note: DXIL backend is experimental.
v0.17.8 — WGSL validation hardening: 8 spec-compliance fixes
WGSL Validation Hardening — 8 spec-compliance fixes
All 8 fixes independently verified against Rust naga — identical rejection behavior.
Fixes
| Fix | Impact | Example |
|---|---|---|
| Mandatory semicolons | Spec compliance | const X: u32 = 42 (no ;) → error |
@must_use enforcement |
Prevent silent bugs | @must_use fn foo() -> u32 {...} foo(); → error |
@compute requires @workgroup_size |
Runtime crash prevention | @compute fn main() {} → error |
const_assert evaluation |
Compile-time validation | const_assert false; → error |
@binding/@group pairing |
Resource validation | @binding(0) var data: ... (no @group) → error |
| Zero-sized arrays | Spec compliance | array<f32, 0> → error |
| Invalid swizzle (stpq) | GLSL rejection | v.stpq → error (GLSL-only) |
| Mixed swizzle namespace | Spec compliance | v.xg → error (mixed x/y/z/w + r/g/b/a) |
| Argument type mismatch (#66) | Runtime crash prevention | vec2<u32> as u32 → error |
35+ new unit tests. Reported by @maxsupermanhd (#66).
v0.17.7 — fix: function call argument type validation (#66)
Fixed
- Function call argument type validation (#66).
WGSL lowerer now validates argument count and types against function
parameters. Passingvec2<u32>whereu32is expected now produces a
clear compile error instead of silently generating invalid shader code
that crashes at pipeline creation. Reported by @maxsupermanhd.
9 test cases covering shape mismatches, count mismatches, and abstract type concretization.
v0.17.6 — 94 golden diff=0, 48.1% parity, output promotion
DXIL Parity Push: 94 golden diff=0, 48.1% line parity
+22 diff=0 shaders compared to v0.17.4 baseline. Seven enterprise-level fixes.
New optimizations
- Single-store local promotion — eliminates alloca/store/load chains for vertex/fragment output staging, matching DXC's direct storeOutput pattern (+6 diff=0)
- Strength reduction —
urem x, 2^N→and x, (2^N-1)at emit time
DXC parity fixes
- Sampler heap after input loads — DXC emit ordering for fragment shaders (+3 diff=0)
- HLSL namer suffix — trailing
_on resource names ending with digits/keywords (+2 diff=0) - Input used mask sorted order — fix extended properties for multi-struct fragment inputs (+1 diff=0)
- Fragment input signature ordering — LOC semantics before SV_Position
- Raw buffer i32 overload — float loads via i32 + bitcast, matching DXC ByteAddressBuffer convention
Metrics
| Metric | v0.17.4 | v0.17.5 | v0.17.6 |
|---|---|---|---|
| DXC golden diff=0 | 72 | 82 | 94 |
| Line parity | 45.7% | 46.5% | 48.1% |
| IDxcValidator | 161/170 | 161/170 | 161/170 |
| gg production | 57/57 | 58/59 | 58/59 |
Note: DXIL backend is experimental. v0.18.0 will mark DXIL as stable.
v0.17.5 — 82 golden diff=0, ir.TypeSize for wgpu VAL-006
DXIL Parity Push + ir.TypeSize for wgpu VAL-006
New: ir.TypeSize() for buffer size validation
Shared type size calculation matching Rust naga's TypeInner::try_size(gctx). Returns byte sizes for all IR types following WGSL/WebGPU alignment rules. Enables wgpu late buffer binding size validation (VAL-006). 23 unit tests.
DXIL parity improvements (+10 golden diff=0)
| Fix | Impact |
|---|---|
| UNorm/SNorm component types | rgba8unorm textures emit UNormF32 (14) not F32 (9) |
| CBV actual struct size | Single f32 push-constant → 4 bytes, not 16 |
| Named metadata ordering | !dx.resources before !dx.viewIdState |
| dx.op attribute classification | Sample/mesh/store functions get nounwind readonly |
| Declaration order normalizer | Alphabetical sort eliminates false-positive ordering diffs |
Metrics
| Metric | v0.17.4 | v0.17.5 | Delta |
|---|---|---|---|
| DXC golden diff=0 | 72 | 82 | +10 |
| Line parity | 45.7% | 46.4% | +0.7% |
| IDxcValidator | 161/170 | 161/170 | = |
| gg production | 57/57 | 58/59 | = |
| Text backends | 100% | 100% | = |
| SPIR-V val | 172/172 | 172/172 | = |
Note: DXIL backend is experimental. v0.18.0 will mark DXIL as stable.