New GEMM Assembly & Configuration Set for Arm SVE #422
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xrq-phys wants to merge 2 commits intoflame:masterfrom
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New GEMM Assembly & Configuration Set for Arm SVE #422xrq-phys wants to merge 2 commits intoflame:masterfrom
xrq-phys wants to merge 2 commits intoflame:masterfrom
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added 2 commits
July 14, 2020 04:40
Commit `f032d5d4a6ed34c8c3e5ba1ed0b14d1956d0097c` added to BLIS an SVE kernel set with GEMM and PACKM assemblies provided for vector length (VL) = 256. This commit further implements a GEMM assembly for vector length = 512. This new assembly: - is a 16x12 double precision micro-kernel; - compiles under both GCC and Clang; - yields about 18GFlOps on Fujitsu's A64fx @2.2GHz.
- This subconfig is created following `docs/ConfigurationHowTo.md`; - GEMM kernels are selected at run time according to effect of the `incd` instruction; - This subconfig is currently named armsve.
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Sorry but according to the latest benchmark this kernel & config is yet to be optimized. |
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This pull request contains 2 parts:
incdinstruction and selects GEMM kernels accordingly.The new PACKM kernel is not registered yet. Sorry for that.
As this pull request can be separated into 2 parts (with the sub-config depending on layout of kernels), I'm not sure if it was good to create pull request this way. If not, I'll close this and open another one with 512-bit assembly kernel only.